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Dual power supply detection circuit

A technology for power supply and detection circuits, applied in the field of logic integrated circuits, which can solve problems such as glitches, overcurrents, and failure of output to return

Pending Publication Date: 2021-08-06
NEXPERIA BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When the power supply is forcing current, the Vcc level may drop, causing the threshold for supply detection to shift, and may prevent the output from returning to Vcc, causing voltage oscillations, which can cause overcurrent
[0005] Also, with high to low voltage transitions and low to high voltage transitions and supply differences between Vcc and Vin in the two supply domains, the threshold voltages may not match
This mismatch can cause glitches

Method used

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Examples

Experimental program
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Embodiment Construction

[0027] figure 2 A general functional block diagram of a power supply detection circuit 200 according to an embodiment is shown. In general, the power supply detection circuit 200 includes: an input stage 210 ; an inverter stage 220 ; a NOR stage 230 ; a first compensation stage 235 and a second compensation stage 236 ; a feedback stage 240 ;

[0028] The input stage 210 comprises a plurality of inputs 211 , 212 . One input terminal receives a first input power supply voltage Vcc 212 , and one input terminal receives a second supply voltage Vin 211 .

[0029] The input stage 210 includes an output line 214 connected to an input of an inverter stage 220 . Inverter output line 222 from inverter stage 220 is connected to NOR stage 230 . Furthermore, inverter output line 222 is also connected to feedback stage 240 , and feedback stage 240 is in turn connected to input stage 210 . A feedforward line 250 is connected from the output line 214 of the input stage to the output line...

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PUM

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Abstract

This disclosure relates to a dual power supply detection circuit, comprising: first and second input stage field effect transistors; an inverter stage; a feedback stage field effect transistor; first and second compensation circuits; wherein the inverter stage comprises a complimentary pair of transistors, the complementary pair of transistors comprising an NMOS transistor and a PMOS transistor configured and arranged such that a gate lengths of the PMOS and NMOS transistors are different. The disclosure also relates to an integrated circuit comprising a dual power supply detection circuit.

Description

technical field [0001] The invention relates to a double power supply detection circuit. The present disclosure also relates to an integrated circuit including a power supply detection circuit, and more particularly, to a logic integrated circuit. Background technique [0002] In power supply circuits for integrated circuits such as logic circuits, during power on or ramp up, the DC supply voltage (or Vcc) will rise and eventually settle at a certain DC value. As the DC supply ramps up, transistors in the power supply circuit experience sub-threshold voltages before a voltage node (such as a gate, source or drain) reaches a particular desired DC supply voltage (Vcc). Operation of transistors at sub-threshold voltages may cause unwanted voltage pulses at the output of the power supply. Such unwanted voltage pulses, also known as glitches, can cause unwanted behavior in integrated circuits to which the power supply circuit is connected. [0003] A glitch may be defined as a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K17/687
CPCH03K17/687H03K17/223H03K19/0185G01R31/40H03K3/0377H03K19/0948H03K19/20
Inventor 吉萨纳德·阿萨姆罗伯特·莫塞尔沃尔特·特尔卡里奥
Owner NEXPERIA BV
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