Method for arbitrary fractional frequency division of digital circuit clock

Abstract

The invention relates to a method for any fractional frequency division of a digital circuit clock, and belongs to the field of digital circuits. The method comprises the following steps: S1, setting a counter with an initial value of 0; S2, performing counting under a main clock with the frequency of N, and adding M to each clock counter value; S3, judging a numerical value obtained by adding M to the counter value, and if the numerical value is smaller than N, returning to the step S2; if not, executing the step S4; S4, when the counter value+M is greater than or equal to N, generating a pulse, and setting the counter value as the counter value+M-N; and S5, repeating the steps S2, S3 and S4, wherein the generated pulses form a target clock with the frequency of M. The method is simple and accurate, and has no accumulative error; for any main clock and target clock, human intervention is not needed, the frequency division counting process is controlled, good adaptability is achieved, and modular design is facilitated.

Description

technical field [0001] The invention belongs to the field of digital circuits, and in particular relates to a method for frequency division of digital circuit clocks by arbitrary decimals. Background technique [0002] In logic design and digital circuit design, it is often necessary to divide the frequency of the clock to obtain clocks of different frequencies for different interfaces and modules. When the relationship between the main clock and the target clock is not an integer multiple, the calculated frequency division value is not one. Integer, there will be decimal items. [0003] When the frequency division value has a decimal item, there are two commonly used frequency division methods. [0004] One is to round off the fractional part of the calculated frequency division value to obtain an approximate integer frequency division value, and use this frequency division value to divide the frequency of the main clock. Due to the rounding operation of the frequency div...

AI Technical Summary

Problems solved by technology

[0007] The technical problem to be solved by the present invention is how to provide a method for arbitrary fractional frequency division of digital circuit clocks to solve the problems of errors or serious periodic jitter in existing fractional frequency division methods

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