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Word line structure and semiconductor memory

A word line and word line contact technology, which is applied in semiconductor devices, digital memory information, semiconductor/solid-state device manufacturing, etc., can solve the problem of insufficient opening and closing speed of memory cells

Active Publication Date: 2022-07-22
CHANGXIN MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Based on this, it is necessary to provide a word line structure and a semiconductor memory device for the problem of insufficient opening and closing speed of the switch in the memory cell due to excessive contact resistance.

Method used

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  • Word line structure and semiconductor memory
  • Word line structure and semiconductor memory
  • Word line structure and semiconductor memory

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Embodiment Construction

[0032] In order to facilitate understanding of the present invention, a more complete description of the present invention will be made below with reference to the related drawings. Preferred embodiments of the invention are shown in the accompanying drawings. However, the present invention may be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0033] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terms used herein in the description of the present invention are for the purpose of describing specific embodiments only, and are not intended to limit the present invention. As used herein, the term "and / or" includes any and all combinations of one or more of the associated line items.

[0034] figure ...

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Abstract

The invention relates to a word line structure and a semiconductor memory. The word line structure includes a first word line array and a second word line array. The first word line array includes a plurality of first word lines extending along the X direction. The first word lines have the same length and are aligned along the Y direction; the second word line array includes a plurality of second word lines extending along the X direction, the plurality of second word lines have the same length, and Aligned and arranged along the Y direction; wherein, the first word line array and the second word line array are not aligned in the Y direction, and the Y direction is perpendicular to the X direction. By causing the first word line array and the second word line array to be out of alignment in the Y direction, a larger arrangement space is provided for the word line contact structure in the horizontal plane, so that the size of the word line contact structure can be enlarged. The cross-sectional area is reduced, the contact resistance between the word line contact structure and the corresponding word line is reduced, and the turn-on and turn-off speed of the switch in the memory cell is improved.

Description

technical field [0001] The present invention relates to the field of semiconductors, in particular to a word line structure and a semiconductor memory. Background technique [0002] The continuous development of science and technology has made people's requirements for semiconductor technology higher and higher, and the area of ​​semiconductor devices has been continuously reduced. Therefore, higher requirements have been placed on the precision and precision of the semiconductor manufacturing process. Semiconductor memory is a memory that uses semiconductor circuits for access, among which, Dynamic Random Access Memory (DRAM) is widely used in various fields due to its fast storage speed and high integration. [0003] The dynamic random access memory includes a plurality of repeated memory cells. As the size of the dynamic random access memory continues to shrink and the integration level continues to increase, the feature size and cell area of ​​the dynamic random access m...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/538H01L27/108H01L21/8242
CPCH01L23/5386H10B12/30H10B12/488H01L23/538G11C11/408G11C8/14
Inventor 刘志拯
Owner CHANGXIN MEMORY TECH INC
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