Test process configuration method and device, storage medium and equipment
A technology of test process and configuration method, which is applied in the semiconductor field, can solve the problems of incorrect modification of relevant information, complexity, and multiple operations of data, and achieve the effects of reducing the frequency of incorrect input, reducing user operations, and strong flexibility
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[0065]In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments It is a part of the embodiments of the present disclosure, but not all of them. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without making creative efforts belong to the protection scope of the present disclosure. It should be noted that, in the case of no conflict, the embodiments in the present disclosure and the features in the embodiments can be combined arbitrarily with each other.
[0066] The present disclosure provides a method for configuring a test flow. The test flow is a test flow different from the main test flow in the semiconductor product test. ...
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