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Memory array-based data configuration circuit and method

A memory array and data configuration technology, applied in the field of integrated circuits, can solve the problems of reducing data reconfiguration efficiency, waste of computing resources and storage resources, etc., and achieve the effect of avoiding waste of computing resources and storage resources and improving efficiency

Pending Publication Date: 2022-03-11
HERCULES MICROELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, reconfiguring all memory arrays will cause a waste of computing resources and storage resources in the FPGA, and reduce the efficiency of data reconfiguration

Method used

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  • Memory array-based data configuration circuit and method
  • Memory array-based data configuration circuit and method
  • Memory array-based data configuration circuit and method

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Embodiment Construction

[0086] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0087] In the description of the embodiments of the present application, words such as "exemplary", "for example" or "for example" are used to represent examples, illustrations or illustrations. Any embodiment or design described as "exemplary", "for example" or "for example" in the embodiments of the present application shall not be construed as being more preferred or more advantageous than other embodiments or designs. Rather, the use of words such as "exemplary", "for example" or "for example" is intended to present related concepts in a specific manner.

[0088] In the description of the embodiments of the present application, the term "and / or" is only an association relationship describing associated objec...

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Abstract

The invention provides a data configuration circuit and method based on a memory array, and relates to the technical field of integrated circuits. The method comprises the following steps: setting a plurality of stages of control circuits to be connected with a plurality of stages of memory arrays in a one-to-one correspondence manner, namely, each stage of memory array corresponds to one stage of control circuit. The multiple stages of control circuits are cascaded, so that the control circuit corresponding to each stage of memory array can control the memory array to perform data configuration, waste of computing resources and storage resources in the FPGA is avoided, and the efficiency of data reconfiguration is improved.

Description

technical field [0001] The present application relates to the technical field of integrated circuits, and in particular to a memory array-based data configuration circuit and method. Background technique [0002] FPGA is a logic device with abundant hardware resources, powerful parallel processing capability and flexible reconfigurable capability. These features make FPGA more and more widely used in data processing, communication, network and many other fields. Due to the reconfigurability of FPGA, the memory array in FPGA can be reconfigured to perform different functions. [0003] At present, the data reconfiguration circuit in the FPGA controls all the memory arrays in the FPGA through the signals in the upper layer code stream every time the FPGA is reconfigured, so as to reconfigure all the memory arrays and make the FPGA perform different functions. However, all memory arrays are reconfigured, which will cause waste of computing resources and storage resources in th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C7/20G11C8/08G11C8/16G11C7/10G06F15/78
CPCG11C7/20G11C8/08G11C8/16G11C7/1057G11C7/1063G11C7/1084G11C7/109G06F15/7871
Inventor 洪亚茹薛庆华王海力
Owner HERCULES MICROELECTRONICS CO LTD