Contact structures for three-dimensional memory devices and methods of forming same
A memory and contact technology, applied in semiconductor/solid-state device parts, semiconductor devices, electric solid-state devices, etc., can solve the problem of high cost
Active Publication Date: 2022-03-11
YANGTZE MEMORY TECH CO LTD
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- Description
- Claims
- Application Information
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Problems solved by technology
However, as the feature size of memory cells approaches the lower limit, planar processes and fabrication techniques become challenging and costly
Thus, the storage density of planar memory cells approaches the upper limit
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[0038] While specific configurations and arrangements are discussed, it should be understood that this is done for illustration purposes only. A person skilled in the relevant art will recognize that other configurations and arrangements may be used without departing from the spirit and scope of the present disclosure. It will be apparent to those skilled in the relevant art that the present disclosure may also be used in various other applications.
[0039] It should be noted that references in the specification to "one embodiment," "an embodiment," "exemplary embodiment," "some embodiments," etc. indicate that the described embodiments may include a particular feature, structure, or characteristic, But each embodiment may not necessarily include that particular feature, structure or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Furthermore, when a particular feature, structure, or characteristic is described in conjunction wit...
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The present disclosure describes a three-dimensional (3D) memory device including a first memory array and a second memory array disposed on a semiconductor layer. The 3D memory device may also include a stepped structure disposed between the first memory array and the second memory array. The stepped structure includes a first stepped region and a second stepped region. The first step region includes a first step structure including a first plurality of steps that descend in a first direction. The second step region includes a second step structure including a second plurality of steps that descend in a second direction. The 3D memory device may also include a contact region disposed between the first step region and the second step region. The contact region includes a plurality of contacts extending through the insulating layer and into the semiconductor layer.
Description
[0001] Cross References to Related Applications [0002] This application claims priority to Chinese Patent Application No. 2021101961129 filed on February 22, 2021, the entire contents of which are incorporated herein by reference. technical field [0003] The present disclosure relates generally to the field of semiconductor technology, and more particularly, to a method for forming a three-dimensional (3D) memory device. Background technique [0004] Planar memory cells are shrunk to smaller sizes by improving process technology, circuit design, programming algorithms, and manufacturing processes. However, as the feature size of memory cells approaches the lower limit, planar processes and fabrication techniques become challenging and costly. Thus, the storage density of planar memory cells approaches the upper limit. Three-dimensional (3D) memory architectures can address density limitations in planar memory cells. Contents of the invention [0005] Embodiments of t...
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IPC IPC(8): H01L27/11529H01L27/11531H01L27/11548H01L27/11556H01L27/11573H01L27/11575H01L27/11582H01L25/18H01L21/60H10B41/41H10B41/27H10B41/42H10B41/50H10B43/27H10B43/40H10B43/50
CPCH01L25/18H01L24/82H01L25/0657H01L25/50H01L2924/1431H01L2225/06524H01L2225/06541H01L2224/08145H01L24/08H10B41/10H10B41/50H10B43/10H10B43/50H10B41/27H10B43/27H01L2224/80895H01L2224/80896H01L2224/80379H01L2924/00014H01L21/76805H01L21/76895H01L23/535H01L24/80H01L2924/14511
Inventor 王迪张中周文犀
Owner YANGTZE MEMORY TECH CO LTD