A fan-out packaging structure and its forming method
A packaging structure and sacrificial material layer technology, applied in semiconductor/solid-state device components, nanotechnology for materials and surface science, semiconductor devices, etc., can solve the problem of low stability of electrical connection structure and stability of semiconductor packaging structure reduce problems, achieve the effect of improving bendability, toughness and stability
Active Publication Date: 2022-06-03
WEIHAI IDEACODS ELECTRONICS TECH CO LTD
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Problems solved by technology
However, in the existing wiring packaging structure, the stability of the electrical connection structure between adjacent semiconductor chips is not high, which easily leads to a decrease in the stability of the semiconductor packaging structure.
Method used
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[0037] The flexible interconnect pattern layer and the insulating dielectric layer are alternately formed multiple times on the second sacrificial material layer, each layer of the
[0038] A plurality of semiconductor chips are arranged on the uppermost insulating medium layer, and each of the semiconductor chips includes
[0039] removing the temporary substrate, followed by forming a penetrating second sacrificial material layer and a
[0042] Wherein, the first sacrificial material layer is a metal material, and the second sacrificial material layer is an organic material and / or
[0043] Wherein, the aperture of the opening is smaller than the aperture of the first perforation.
[0045] Wherein, the shape of the first conductive pad is a circle or a square, the diameter or side of the first conductive pad
[0047] wherein, before depositing a conductive material in the first through hole to form a first conductive through hole, the first conductive through hole is removed
[00...
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Abstract
The invention relates to a fan-out packaging structure and a forming method thereof, and relates to the field of semiconductor packaging. By setting the first, second, and third flexible interconnection pattern layers on the sacrificial material layer, the first through hole of the first sacrificial material layer, the openings of each flexible interconnection pattern layer and the semiconductor chip The first conductive pads are correspondingly overlapped, and the first conductive vias are used to realize the electrical connection between the multilayer flexible interconnection pattern layer and the first conductive pads of the semiconductor chip. The arrangement of the above structure effectively improves the connection between adjacent semiconductor chips. The stability of the electrical connection structure is further ensured by setting the aperture of the opening to be smaller than the aperture of the first through hole and the diameter or side length of the first conductive pad to be larger than the aperture of the first through hole. In the process of forming the first through hole, each flexible interconnection pattern layer is effectively exposed, further improving the stability of the electrical connection.
Description
A fan-out package structure and method of forming the same technical field [0001] The present invention relates to the field of semiconductor packaging, and in particular, to a fan-out packaging structure and a method for forming the same. Background technique In the existing semiconductor package structure, in order to realize the electrical connection between adjacent semiconductor chips, it is usually necessary to A bridge module is provided, and in order to improve the precise alignment of the wiring structure, in the prior art, a layer wiring layer, and then the opening process realizes the electrical connection between the wiring layer and the semiconductor chip. However, the existing wiring package structure , the stability of the electrical connection structure between adjacent semiconductor chips is not high, which may easily lead to the stability of the semiconductor package structure. Decreased sex. SUMMARY OF THE INVENTION The object of the present i...
Claims
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IPC IPC(8): H01L21/768H01L23/538B82Y30/00
CPCH01L21/76895H01L23/5386B82Y30/00
Inventor 张琳王训朋邢加明
Owner WEIHAI IDEACODS ELECTRONICS TECH CO LTD