Fixed-point data dynamic truncation method for storage and calculation fusion type processor architecture
A processor architecture and fixed-point data technology, applied in the direction of electrical digital data processing, calculation using number system representation, digital data processing components, etc., can solve the problem of low versatility, lack of scalability, and single fixed-point rounding mode and other issues to achieve the effect of improving versatility, good scalability, and solving a single fixed-point rounding mode
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[0025] A fixed-point data dynamic truncation method for a storage-computing integrated processor architecture. The truncation data d_cut in the input fixed-point data d_in is rounded to the valid data d_valid in the high order of the fixed-point data d_in according to the rounding mode. , and then saturate the low out_w bit of the precise value d_precise after the rounding process and then output it to obtain the truncated output value d_out of the fixed-point data d_in.
[0026] The following describes the different rounding and carry processing corresponding to different rounding modes in combination with Table 1. The input data in Table 1 are represented by decimal numbers and binary numbers respectively. The total bit width of the binary number is 7 bits, the integer part is 4 bits, and the fractional part is 3 bits. It means that if the binary integer part is I(X) and the fractional part is F(X), then the fixed-point data is X=I(X)+F(X). For example, 7-bit binary positi...
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