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Fixed-point data dynamic truncation method for storage and calculation fusion type processor architecture

A processor architecture and fixed-point data technology, applied in the direction of electrical digital data processing, calculation using number system representation, digital data processing components, etc., can solve the problem of low versatility, lack of scalability, and single fixed-point rounding mode and other issues to achieve the effect of improving versatility, good scalability, and solving a single fixed-point rounding mode

Pending Publication Date: 2022-04-29
安徽芯纪元科技有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] At present, in the fixed-point data truncation circuit, in order to improve the accuracy of the effective data, it is necessary to further round the truncated mantissa, but the existing fixed-point data truncation circuit has the disadvantage of a single fixed-point rounding mode
In addition, the existing fixed-point data truncation adopts a static truncation method with a fixed truncation bit width. When the truncation bit width needs to be changed according to the demand, it cannot meet the demand, and has the disadvantages of lack of scalability and low versatility.

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  • Fixed-point data dynamic truncation method for storage and calculation fusion type processor architecture
  • Fixed-point data dynamic truncation method for storage and calculation fusion type processor architecture
  • Fixed-point data dynamic truncation method for storage and calculation fusion type processor architecture

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Embodiment 1

[0025] A fixed-point data dynamic truncation method for a storage-computing integrated processor architecture. The truncation data d_cut in the input fixed-point data d_in is rounded to the valid data d_valid in the high order of the fixed-point data d_in according to the rounding mode. , and then saturate the low out_w bit of the precise value d_precise after the rounding process and then output it to obtain the truncated output value d_out of the fixed-point data d_in.

[0026] The following describes the different rounding and carry processing corresponding to different rounding modes in combination with Table 1. The input data in Table 1 are represented by decimal numbers and binary numbers respectively. The total bit width of the binary number is 7 bits, the integer part is 4 bits, and the fractional part is 3 bits. It means that if the binary integer part is I(X) and the fractional part is F(X), then the fixed-point data is X=I(X)+F(X). For example, 7-bit binary positi...

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Abstract

The invention discloses a fixed-point data dynamic truncation method for a storage and calculation fusion type processor architecture, which comprises the following steps of: performing rounding and carrying processing on high-order effective data dvalid of fixed-point data din by truncation data dcut in the input fixed-point data din according to a rounding mode, performing saturation processing on a low outw bit of an accurate value dpre after the rounding and carrying processing, and outputting the low outw bit. Obtaining an output value dout after the fixed point data din is intercepted; the rounding carry processing is completed by adding a carry value to a binary integer part of the fixed-point data din, the carry value is formed by adding a binary decimal part and a special value, and different rounding modes correspond to different special values. According to the method, five standard rounding modes in IEEE 754 are compatible, and the problem that the fixed-point rounding mode of an existing fixed-point data bit intercepting method is single is solved.

Description

technical field [0001] The invention relates to the technical field of fixed-point data truncation processing, in particular to a fixed-point data dynamic truncation method for a memory-computing integrated processor architecture. Background technique [0002] With the continuous development of digital signal processing (DSP) technology, it has high-speed data processing capability and powerful instruction system, which can realize various digital signal processing operations quickly and in real time, and has been applied in various fields. Compared with floating-point DSP chips, fixed-point DSP chips also have the characteristics of lower price, faster operation speed, and less memory units, and are more widely used. [0003] The processor architecture of the fixed-point DSP chip uses two's complement to represent data internally. If there is no special processing, the data is in fixed-point form. In the process of digital signal processing, a large number of multiplicatio...

Claims

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Application Information

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IPC IPC(8): G06F7/499G06F7/48G06F7/50
CPCG06F7/49947G06F7/4824G06F7/50
Inventor 肖贞杰刘玉胡孔阳韩琼磊刘金良周洁
Owner 安徽芯纪元科技有限公司