Semiconductor structure and manufacturing method thereof

Abstract

The invention relates to a semiconductor structure and a manufacturing method thereof. Semiconductor structures and methods are provided. According to the present disclosure, a semiconductor structure includes: a first fin structure and a second fin structure over a substrate; a first source / drain feature and a second source / drain feature, the first source / drain feature disposed over the first fin structure and the second source / drain feature disposed over the second fin structure; a dielectric feature disposed over the first source / drain feature; and a contact structure formed over the first source / drain feature and the second source / drain feature. The contact structure is electrically coupled to the second source / drain feature and is separated from the first source / drain feature by a dielectric feature.

Description

technical field [0001] The present disclosure generally relates to semiconductor structures and methods of fabrication thereof. Background technique [0002] The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced several generations of ICs, each of which has smaller and more complex circuits than the previous generation. During IC development, functional density (ie, the number of interconnected devices per chip area) typically increases, while geometry size (ie, the smallest component (or line) that can be created using a fabrication process) decreases. This scaling down process often provides benefits by increasing production efficiency and reducing associated costs. This scaling down also increases the complexity of handling and manufacturing the ICs. [0003] For example, as integrated circuit (IC) technology has evolved to smaller technology nodes, multi-gate metal-oxide-s...

AI Technical Summary

Problems solved by technology

As a trade-off, elongated source / drain contacts may overlap adjacent gate structures, resulting in increased parasitic capacitance between source / drain contacts and gate structures

Thus, while the source / drain contacts of existing multi-gate devices are generally adequate for their intended purpose, they are not satisfactory in all respects

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