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Method and system for improving read reliability in memory device

A memory system, memory technology, applied in static memory, digital memory information, information storage and other directions

Pending Publication Date: 2022-05-27
IBM CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This disclosure is intended for those of ordinary skill in the art

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  • Method and system for improving read reliability in memory device
  • Method and system for improving read reliability in memory device
  • Method and system for improving read reliability in memory device

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Embodiment Construction

[0022] The following description is made to illustrate the general principles of the invention and is not meant to limit the inventive concepts claimed herein. In the following detailed description, numerous details are set forth in order to provide an understanding of memory devices and systems, their architectures, and methods of operation, however, those skilled in the art will appreciate that differences in memory devices and systems, their architectures, and methods of operation and many embodiments may be practiced without these specific details, and the claims and the invention should not be limited to the embodiments, subcomponents, features, procedures, methods, aspects, details specifically described and illustrated herein. Further, certain features described herein may be used in combination with other described features in each of the different possible combinations and permutations.

[0023] Unless otherwise specifically defined herein, all terms are to be given t...

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Abstract

A system and method for storing data includes at least one memory device having a plurality of memory cells for storing data; and a memory control circuit to manage a read current and a read pulse width applied to the memory cell, where the at least memory device has a read current circuit configured to utilize at least one of an adjusted read current or read pulse width applied to the memory cell. In response to a request to read a group of memory cells, in an example, in response to determining that a comparison temperature value exceeds a first threshold, the memory control circuit is configured to perform at least one of decreasing a read current and / or increasing a read pulse width to be applied to the group of memory devices to be read.

Description

Background technique [0001] The present invention relates to memory systems and devices including magnetic random access memory (MRAM), and more particularly to improvements in the reliability of MRAM. [0002] With the latest advances in information technology and the widespread use of the Internet for storing and processing information, computing systems have put forward more and more demands on the acquisition, processing, storage, and dissemination of information. Computing systems are being developed to increase the speed at which computers can execute increasingly complex applications for business purposes, personal use, and entertainment. The overall performance of a computer system is affected by each key element of the computer architecture, including the performance / architecture of the processor, any memory caches, input / output (I / O) subsystems, efficiency of memory control functions, memory devices, and memory The capabilities of the subsystem, and any associated m...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/16
CPCG11C7/04G11C11/161G11C11/1659G11C11/1673G11C11/5607G11C11/40626G11C11/5642G11C11/5628
Inventor S.塞图拉曼V.泰维娅H.亨特K.拉嘉马妮C.苏布拉曼尼亚
Owner IBM CORP