Unlock instant, AI-driven research and patent intelligence for your innovation.

ATM exchanger with central scheduling program and its scheduling method

An ATM switch and central scheduling technology, applied in the field of switches, can solve the problem of insufficient tightness of logic gates

Inactive Publication Date: 2005-05-11
NEC CORP
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

State-of-the-art systems are also not compact enough in the required logic gates, which is important when the system is implemented in silicon technology

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • ATM exchanger with central scheduling program and its scheduling method
  • ATM exchanger with central scheduling program and its scheduling method
  • ATM exchanger with central scheduling program and its scheduling method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0031] image 3 A schematic diagram depicting the ATM scheduler architecture for a 128-port input / output ATM switch. As described earlier, the ATM scheduler can be imagined as a finite state machine, where the next state is based on the current state and all inputs. Each input port in a switch can be in one of three states: not ready, regular ready, and limited ready. The scheduler must select a priority ready port from the ready input ports in a round-robin fashion with a higher priority than regular ready ports.

[0032] The READY signal for each port is obtained by logically combining the signals IB_STATUS, OB_STATUS and MCR_STATUS. If the bit position of READY for a port is '1', it means that the port can send cells to the designated output port called OB. If the bit is '0', the port cannot send cells. The OB_STATUS signal is a backpressure signal from the OB, indicating the degree of congestion at the output port. Each OB can be in one of three states: STOP, SHAPE or...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

Novel structure and implementation of a round robin scheduler (RRS) for high capacity ATM switches. Based on the port's priority, a port is selected from a set of alternating real-time / non-real-time priority ports, and the minimum cell rate (MCR) is assigned to the port and the backpressured signal from the output buffer. A fast executor that produces a scheduler using a binary tree structure. Nodes in the binary tree act as "cut-in" switches, so the scheduler can run at high speed. This scheduler is suitable for execution in high-speed silicon technologies. It is compact, very scalable and a viable option in megabit ATM switches in terms of logic gate requirements.

Description

technical field [0001] The present invention relates to a network system and a switch for controlling data flow around the network, more particularly to a high-capacity Asynchronous Transfer Mode (ATM) switch and a scheduler for managing ATM cell flow through the switch. Background technique [0002] ATM switches have been used in numerous local area network (LAN) / wide area network (WAN) and telecommunications systems. figure 1 The basic structure of an ATM switch is shown in . A switch includes a set of input ports, a set of output ports, and a central scheduler. Flowing ATM cells arrive at the output port and are switched to the designated output port. Any input may arrive at any output at a different time as determined by the ATM scheduler. With multiple ATM switches, there is a limit in any cell time that only one cell can be scheduled. An input can be connected to one or several outputs. Therefore, the mapping of inputs to outputs is a one-to-many operation. If on...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/56H04Q11/04
CPCH04L49/203H04L49/255H04L49/3081H04L2012/5635H04L2012/5651H04L2012/5679H04Q11/0478
Inventor 谢里夫·M·沙瑞尔亚力山大·T·伊什
Owner NEC CORP