Bit line controlling decoder circuit, semiconductor storage device and data reading method thereof
A semiconductor and decoder technology, applied in the field of data readout, which can solve problems such as misreading and leakage current prevention
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[0101] The present invention will be described in detail below based on the embodiments shown in the accompanying drawings.
[0102] figure 1 A structure of a memory array of a virtual ground type nonvolatile semiconductor storage device of one embodiment is shown. The memory array is virtually grounded, with one of the blocks of the memory array shown on the diagram. ACT (Asymmetric Contactless Transistor) cells are called memory cells.
[0103]The ACT unit works as follows. It should be noted that FT (Fowler-Nordheim) tunneling is used for writing and erasing. First, read and verify operations will be described. Read and verify operations are performed in the same manner. During readout, such as Figure 9A As shown, a read voltage (verification voltage) is applied to the write line WL of the transistors constituting each memory cell, and a voltage of 1 volt is applied to the source side sub-bit line SB. Then, the sense amplifier performs sense amplification to determ...
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