Electric erasing programmable logic element

Abstract

The invention discloses an electrically erasable programmable logic element, which comprises a P-type substrate; a first N-type ion-doped region located in the P-type substrate; a first gate located in the P-type substrate. On the P-type substrate and adjacent to the first N-type ion-doped region, and in a floating state, used to store data; a second N-type ion-doped region, located in the P-type substrate and connected to the P-type substrate The first gate is adjacent; a second gate, as a control gate, is located on the P-type substrate and is adjacent to the second N-type ion-doped region; a third N-type ion-doped region region, located in the P-type substrate and adjacent to the second gate.

Description

technical field

[0001] The invention relates to an electrically erasable programmable logic element, in particular to an electrically erasable programmable logic element which can be manufactured by using a standard CMOS process, and does not require additional floating gate area to reduce volume. Background technique

[0002] In recent years, as the demand for portable electronic products increases, the technology and market application of Electrically Erasable Programmable Read-Only Memory (hereinafter referred to as EEPROM) are becoming increasingly mature and expanding. The fields of application of EEPROM include products such as digital camera negatives, mobile phones, video game consoles (Video Game Console), personal digital assistant (Personal Digital Assistant, PDA) memory cards, telephone answering devices, and programmable ICs. EEPROM is a kind of non-volatile memory (Non-Volatile Memory). Its operating principle is to control the opening or closing of the corresp...

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