Duty degree correction circuit and delayed phase-lock loop having same

Abstract

The present invention provides a duty cycle correction circuit (DCC) and a delay locked loop (DLL) including the same. The inventive duty cycle correction circuit includes: a first clock dividing unit and a second clock dividing unit for dividing an ordinary input clock and a sub ordinary input clock; a first clock mixing unit; a second clock mixing unit; and a logic combination unit for generating a duty cycle correction clock. In addition, the inventive delay locked loop (DLL) includes: a first and second clock dividing unit; a frequency detecting unit; a first variable delaying unit; a second variable delaying unit; a first clock mixing unit; a second clock mixing unit; and a logic combination unit.

Description

technical field [0001] The present invention relates to a semiconductor circuit, more specifically to a duty cycle correction circuit (DCC, duty cycle correction) and a delay locked loop (DLL, delay locked loop) having the duty cycle correction circuit . Background technique [0002] In general, the timing of operations can be adjusted using a clock as a reference. This clock can also be used to ensure higher speed operation without any errors. When an external clock input from the outside is used as an internal clock in an internal circuit, a time delay will occur in the internal circuit. The time delay between the external clock and the internal clock can be compensated by using a DLL so that the internal clock and the external clock have the same phase. [0003] Also, DLLs are less susceptible to noise than traditional phase-locked loops (PLLs). Therefore, DLLs can generally be used for double data rate synchronous DRAM (DDR SDRAM) as well as synchronous semiconductor...

AI Technical Summary

Problems solved by technology

[0016] However, conventional DCC circuits have some disadvantages

As shown in Figure 2, the DCC circuit is an analog circuit, so it consumes a lot of power

In addition, the DCC circuit must be placed before and after the delay line of the DLL, thus occupying too much die area

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