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Fast increment device of using zero detection and its increasing method

An incrementer and incremental technology, applied in the field of calculators, can solve the problem of occupying the chip area of ​​the microprocessor

Inactive Publication Date: 2004-08-11
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the zero-stop incrementer consumes a large area of ​​the microprocessor chip due to the use of many static logic gates

Method used

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  • Fast increment device of using zero detection and its increasing method
  • Fast increment device of using zero detection and its increasing method
  • Fast increment device of using zero detection and its increasing method

Examples

Experimental program
Comparison scheme
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example 1

[0045] Operands: 1111 0000 111 1111 1011 1111 1111 1111

[0046] The entire increment value: 1111 0000 1111 1111 1100 0000 0000 0000

[0047] CA: CACACACACACACA

[0048] ZD: ZDZDZDZDZDZDZDZD

[0049] The flag information generation unit 120 outputs the flag information for each 4-bit group by the following: that is, by starting from the LSB including the information ZD for the first logic state of every 4-bit group to generate the first group with the second logic state one logic state, and the same for subsequent lower-order groups, and produces a second logic state for higher-order groups preceding the first group with a second logic state.

[0050] If the 32-bit operand IN is divided into 8 4-bit groups, the flag information CA is composed of 1 bit for each 4-bit group, thus resulting in a total of 8 bits of flag information CA. The flag information CA is composed of a first logic state or a second logic state, and the flag information CA of the first group and the flag ...

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Abstract

A fast incrementer using zero detection and an increment method thereof. The incrementer performs a logic combination on an operand, first logic state inclusion information for each b-bit group of the operand, flag information for each b-bit group of the operand, and an increment value, and outputs a whole increment value for the operand.

Description

[0001] This application claims priority from Korean Patent Application No. 10-2003-7415 filed in the Korean Intellectual Property Office on February 6, 2003, the entire contents of which are hereby incorporated by reference. technical field [0002] The invention relates to a microprocessor calculator, in particular to an incrementer. Background technique [0003] An incrementer is an adder or counter that adds a binary "1" to an input operand. In a microprocessor, an incrementer performs various operations, including calculating the 2's complement of Boolean logic or adding a binary "1" to an input operand. [0004] A traditional incrementer using a full adder has a slow operating speed because it has to wait for the carry to be transmitted. Also, because a conventional incrementer includes circuitry to handle the carry, it takes up a lot of area on a microprocessor chip. [0005] A zero-stop incrementer using multiple static logic gates is discussed in US Patent No. 5,63...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/21G06F7/38G06F7/50G06F7/505
CPCG06F7/5055G06F7/50
Inventor 权约翰
Owner SAMSUNG ELECTRONICS CO LTD