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Data transferring device and method

A data transmission and data technology, applied in the direction of electrical digital data processing, instruments, etc., can solve the problem of increasing the number of transmission cycles, and achieve the effect of reducing the circuit scale, shortening the data transmission time, and increasing the data transmission speed.

Inactive Publication Date: 2005-02-23
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This fact causes a similar problem that the number of transfer cycles is increased even in a data transfer device that performs a pipeline transfer operation in order to perform a high-speed data processing operation

Method used

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  • Data transferring device and method
  • Data transferring device and method
  • Data transferring device and method

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Embodiment Construction

[0037] Embodiments of a data transmission device and a data transmission method according to the present invention will now be described with reference to the accompanying drawings. figure 1 is a diagram schematically showing the configuration of the data transmission device according to Embodiment 1. The data transfer device includes a bus master 100 , a bus slave 120 , an address bus 130 and a data bus 131 . Both the bus master 100 and the bus slaves 120 are connected to the address bus 130 . The bus slave 120 is connected to the data bus 131 .

[0038] The bus master 100 has a data transfer control section 110 that controls the operation of the bus slaves 120 . In this data transfer control section 110, a transfer information holding unit 111 is provided. On the other hand, the bus slave 120 is constituted by an arbitrary plurality of groups of slaves. In this embodiment, the bus slaves 120 are composed of two groups of slaves, namely, a transfer source device 121 and a...

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PUM

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Abstract

In a data transfer apparatus, an operation cycle number required to transfer data is reduced. Since data transfer control means 110 is provided which controls access timing with respect to a transfer source and a transfer destination based upon transfer latency information 591 and 592, data outputted from a transfer source device 121 is directly acquired to a transfer destination device 122. As a result, data transfer time can be omitted which is required to temporarily store data into a data buffer, and since the data buffer is omitted, a circuit scale can be reduced and also data transfer time can be shortened.

Description

technical field [0001] The present invention relates to a data transmission device and a data transmission method, wherein the data transmission operation between two or more slave devices connected to the bus is performed by a bus master. Background technique [0002] Conventionally, in such data transfer devices, the bus master is equipped with a data buffer. When the data transfer means performs a data transfer control operation by designating the address of the transfer source slave device and the address of the transfer destination slave device, when a data transfer request is issued, data is temporarily stored from the transfer source slave device to the data transfer device based on the address of the transfer source buffer, and output the data stored in the data buffer to the transfer destination slave device based on the transfer destination address (see, for example, Japanese Unexamined Patent Application No. HEI-11-85670 ( figure 1 )). [0003] However, in the a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/28G06F13/00G06F13/14G06F13/38G06F13/42
CPCG06F13/4282
Inventor 高桥阳子三野吉辉隅田圭三
Owner PANASONIC CORP