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Fractal sequencing schemes for offset cancellation in sampled data acquisition systems

A sampling sequence, fractal technology, applied in the direction of code conversion, electrical components, analog conversion, etc., can solve the problem of inability to filter, achieve the effect of eliminating signal offset and reducing 1/f noise

Active Publication Date: 2006-11-08
MICROCHIP TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, low-frequency DC offset and 1 / f noise cannot be filtered out by a low-pass filter, and thus these effects will typically pass through the filter along with the signal information

Method used

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  • Fractal sequencing schemes for offset cancellation in sampled data acquisition systems
  • Fractal sequencing schemes for offset cancellation in sampled data acquisition systems
  • Fractal sequencing schemes for offset cancellation in sampled data acquisition systems

Examples

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Embodiment Construction

[0017] The preferred embodiment and its advantages are best understood by referring to Figures 1 through 5, wherein like reference numerals are used to indicate like and corresponding parts.

[0018] In one aspect, exemplary embodiments of the present invention are preferably operable to separate an offset component of an input signal and perform special processing on the offset component so as to cancel the offset component without disturbing the input signal. Therefore, in an exemplary embodiment of the present invention, two functions are preferably performed. In a first aspect, exemplary embodiments of the present invention are operable to isolate offset components typically present in sampled input signals. In a second aspect, exemplary embodiments of the present invention are operable to effectively cancel the isolated offset component, leaving the desired sampled signal for further processing by the device circuitry.

[0019] Referring first to FIG. 1 , a diagram opera...

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Abstract

The present invention is directed to the isolation and cancellation of the offset voltage component typically experienced at the input of sampled-data analog systems. In an exemplary embodiment, offset isolation and cancellation may be performed during normal operation of the sampling circuitry. In an exemplary embodiment, the present invention combines a front-end switching topology with one or more differential integrator stages and a logic algorithm implemented in the differential integrator stages. In operation, the circuitry preferably performs a number of samples for each stage, applies an inversion factor to the samples in accordance with the algorithm and integrates the samples to effect the cancellation of the offset voltage without substantially affecting the sampled input.

Description

technical field [0001] The present invention relates generally to delta-sigma analog-to-digital converters and, more particularly, to enhancement of sampled signal quality in sampled data acquisition systems. Background technique [0002] Today, analog-to-digital (A / D) converters are widely used in electronic equipment such as consumer, industrial applications and weapons. Typically, an A / D converter includes circuitry for receiving an analog input signal and outputting a digital value proportional to the analog input signal. The digital output value is typically in the form of a parallel word or a serial string of digital bits. There are many types of A / D conversion schemes, such as voltage-to-frequency conversion, charge redistribution, delta modulation, and so on. Each of these selected transformation schemes typically has its advantages and disadvantages. [0003] One type of A / D converter that is increasingly used is the A / D converter utilizing delta-sigma modulation...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M3/00
CPCH03M3/356H03M3/43H03M3/438H03M3/00
Inventor 文森特·奎奎姆普瓦菲利普·德沃尔
Owner MICROCHIP TECH INC
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