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Sparse convolution of multiple vectors in a digital signal processor

A digital signal and processor technology, applied in the field of convolution operation of multiple vectors, can solve problems such as large amount of calculation

Active Publication Date: 2006-11-15
VIA TECH INC
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Problems solved by technology

[0026] As can be seen from the above steps, computing the convolution of multiple vectors can be a computationally intensive and demanding task

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  • Sparse convolution of multiple vectors in a digital signal processor
  • Sparse convolution of multiple vectors in a digital signal processor
  • Sparse convolution of multiple vectors in a digital signal processor

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Embodiment Construction

[0066] In describing the preferred embodiments of the present invention illustrated in the drawings, specific terminology is used for clarity. However, the present invention is not intended to be limited to the specific terms so selected, and it should be understood that each specific component includes all technical equivalents that operate in a similar manner.

[0067] The condition that the vector contains zero clusters can be said to be the true condition of the data vector representing the video and / or audio signal in the real world. When calculating the convolution, the zero clusters in the vector may cause multiple processing steps to be executed in multiple processing cycles, but the results of these execution processes actually do not contribute to the accumulation of the convolution. Therefore, the specific embodiment of the present invention seeks to avoid that multiple processing steps only process multiple vector elements that are identified as having zero values ​​in...

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Abstract

The present invention provides a method for performing sparse convolution of multiple vectors in a digital signal processor, wherein a first vector has multiple vector elements, and at least one second vector is used to perform convolution on at least one first vector. The method includes the operation of identifying vector elements in the first vector that do not have a value of zero and performing a convolution with the second vector for the vector elements in the first vector that do not have a value of zero.

Description

Technical field [0001] The present invention relates to a convolution operation of multiple vectors, and particularly relates to a method and system for a sparse convolution operation of multiple vectors in a digital signal processor. Background technique [0002] Digital Signal Processing (DSP) is a check and operation of digital representation of electronic signals. The digital signal processed by digital signal processing is usually a digital representation of audio and / or video from the real world. [0003] The digital signal processor is a dedicated microprocessor for optimizing digital signal processing. Digital signal processors are generally designed to process digital signals in real time, for example, by using a real-time operating system (RTOS). RTOS is an operating system that can process multiple tasks at the same time when receiving multiple tasks. RTOS generally gives tasks various priority levels and allows high-priority tasks to interrupt low-priority tasks. RTOS...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/15
CPCG06F17/15
Inventor 斯蒂格·斯顿斯
Owner VIA TECH INC
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