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SPI apparatus telecommunication circuit

A device communication, SPI bus technology, applied in electrical digital data processing, instruments, etc., can solve the problems of communication impact, design complexity, interference, etc., and achieve the effect of reducing the number of pins used, reducing mutual interference, and reducing design costs

Inactive Publication Date: 2007-06-20
HONG FU JIN PRECISION IND (SHENZHEN) CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] But, the SPI bus 30 ' of this SPI device communication circuit is owing to parallel connection a plurality of peripheral chips 20 ', and then SPI bus 30 ' needs to drive described all peripheral chips 20 ' simultaneously, and this just may exceed SPI bus 30 ' Drive ability, so that the communication between CPU10' and peripheral chip 20' is affected
Moreover, the peripheral chips 20' are connected in parallel with each other, which may cause interference between each other during work, and also affect the communication with the CPU10'
When the quantity of described peripheral chips 20' was a lot, more GPIO pins would need to be applied, which undoubtedly wastes the limited GPIO pin resources of CPU 10', which may cause other parts of the computer system to have no available GPIO pins. Pin resources make its design more complex, resulting in increased computer system design costs

Method used

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Embodiment Construction

[0011] Please refer to Fig. 2, the preferred embodiment of SPI device communication circuit of the present invention comprises a master device (as CPU10 in the computer system), several slave devices (as in the computer system by the peripheral chip 20 of SPI and CPU communication), SPI The bus 30 and a multiplexer 40 are described here by taking four peripheral chips 20 as an example.

[0012] Described CPU10 has a SPI bus control unit 12, is used for receiving the data transmitted to CPU10 by SPI bus 30; Described CPU10 also has a chip gating unit 14, is used for controlling the gating of described peripheral chip 20, makes Communication between a peripheral chip 20 and the CPU 10 is required, and the gate terminal 14 includes several GPIO pins of the CPU 10 .

[0013] Wherein, the SPI of each peripheral chip 20 is connected to the input of the multiplexer 40, and the output of the multiplexer 40 is connected to the SPI bus control unit 12 of the CPU 10 through the SPI bus 3...

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Abstract

A communication circuit of SPI device is prepared as carrying out communication with master device by slave device though SPI bus, setting multiplexer between slave device and SPI bus, connecting master device to gate end of multiplexer, controlling gate of slave device by master device through said multiplexer for making required slave device be on communication with master device.

Description

【Technical field】 [0001] The invention relates to a SPI (Serial Peripheral Interface, Serial Peripheral Interface) device communication circuit. 【Background technique】 [0002] In computer systems, SPI is an interface that allows serial data exchange between two devices (one is called a master device and the other is called a slave device). SPI is most commonly used in the communication circuit system between the CPU (Central processing unit, central processing unit) of the computer system and peripheral chips. For example, the energy metering chip (Energy Metering IC) transmits data such as voltage and current to the CPU through SPI. . [0003] Please refer to Fig. 1, when CPU10 ' (master equipment) needs to communicate with a plurality of peripheral chips (slave equipment, illustrate with four peripheral chips 20 ' here) by SPI, common practice is: earlier each peripheral chip The SPI of 20' is connected with the SPI bus 30' respectively, and then the SPI bus 30' is conn...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/38
CPCG06F13/4291
Inventor 郭恒祯
Owner HONG FU JIN PRECISION IND (SHENZHEN) CO LTD
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