Solder masks used in encapsulation, assemblies including the solar mask, and methods

Abstract

A carrier (e.g., a carrier substrate, such as a circuit board, etc.) may be modified to include a solder mask on a surface thereof. The solder mask, which may extend to or beyond an edge of the carrier, includes an opening that exposes at least one contact area of the carrier. The opening of the solder mask is configured and positioned such that a conductive element (e.g., a bond wire), at least a portion of which extends laterally, that may protrude from the contact area will be at least partially laterally surrounded by the solder mask. A retention element may be secured to the solder mask, over the conductive element and a portion of the opening of the solder mask, with a portion of the opening remaining exposed beyond the retention element to facilitate the introduction of encapsulant material into the opening and around the conductive element. Assemblies that include these features and assembly methods are also disclosed.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is a continuation of application Ser. No. 11 / 108,151, filed Apr. 8, 2005, which is a continuation of application Ser. No. 10 / 201,208, filed Jul. 22, 2002, now U.S. Pat. No. 6,984,545, issued Jan. 10, 2006.BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates generally to solder masks and use thereof in packaging semiconductor devices and, more specifically, to a method for encapsulating portions of a semiconductor device package using a solder mask as a mold for the encapsulant material. [0004] 2. Background of Related Art [0005] As the dimensions of electronic devices are ever decreasing, the sizes of the structures used to package the microprocessors, memory devices, other semiconductor devices, and other electronic componentry must also become more compact. [0006] One approach to reducing the size of semiconductor device assemblies is to minimize the profiles of the semicon...

AI Technical Summary

Benefits of technology

"The present invention relates to a method for packaging semiconductor devices using a solder mask as a mold for the encapsulant material. The method includes providing a carrier substrate with a slot and a solder mask with an opening and smaller openings exposing contact areas on the substrate. A semiconductor die is secured to the substrate and connected to the contact areas using intermediate conductive elements. The encapsulant material is then confined within the solder mask, allowing for the use of low viscosity materials. Conductive structures, such as solder balls, may be formed on the exposed contact areas. The invention provides a semiconductor device assembly or package with a solder mask and encapsulant material, as well as conductive structures such as solder balls."

Problems solved by technology

However, the height of the resulting glob-top structure may be higher than is required to properly encapsulate the wire bonds and may interfere with subsequent packaging steps.

The presence of a glob-top structure may, however, make it difficult to place the solder mask over the carrier substrate, particularly if the glob-top material has moved too far laterally.

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