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Silicide process utilizing pre-amorphization implant and second spacer

a technology of silicon silicide and implant, which is applied in the direction of semiconductor devices, electrical equipment, transistors, etc., can solve the problems of flawed titanium silicide process

Active Publication Date: 2006-09-28
UNITED MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Besides, the titanium silicide process is flawed because each titanium atom consumes two silicon atoms to form the titanium silicide.

Method used

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  • Silicide process utilizing pre-amorphization implant and second spacer
  • Silicide process utilizing pre-amorphization implant and second spacer
  • Silicide process utilizing pre-amorphization implant and second spacer

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Embodiment Construction

[0026] The present invention is directed to a silicide process utilizing pre-amorphization implant (PAI) and a second spacer. The advantages include: (1) the extension dopant deactivation is minimized since less area of the extension region is amorphized, thus the device performance can be improved; (2) the second spacer can avoid the nickel silicide piping effect.

[0027]FIGS. 5-10 are schematic, cross-sectional diagrams showing the improved nickel silicide process according to one preferred embodiment of the present invention. As shown in FIG. 5, a gate electrode 12 is formed over a substrate 10 such as a P type silicon substrate, with a gate oxide layer 14 therebetween.

[0028] As shown in FIG. 6, a lining layer 15, preferably a silicon dioxide layer, is then deposited over the top surface and sidewalls of the gate electrode 12, and on the exposed surface of the substrate 10. The thickness of the lining layer 15 typically ranges between 50 angstroms and 400 angstroms, but not limit...

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Abstract

A gate electrode is formed on a substrate with a gate insulating layer therebetween. A liner is then deposited on sidewalls of the gate electrode. Source / drain extensions are implanted into the substrate. A first spacer is then formed on the liner. Deep source / drain are implanted into the substrate. A second spacer is formed at the foot of the first spacer. A tilt-angle pre-amorphization implant (PAI) is conducted to form an amorphized layer next to the second spacer. A metal layer is then sputtered on the amorphized layer. The metal layer reacts with the amorphized layer to form a metal silicide layer thereto.

Description

BACKGROUND OF INVENTION [0001] 1. Field of the Invention [0002] The present relates generally to semiconductor device fabrication. More particularly, the present invention relates to a silicide process utilizing pre-amorphization implant (PAI) and a second spacer. [0003] 2. Description of the Prior Art [0004] As known in the art, silicide such as titanium silicide (TiSi2) is a typical contact material used to reduce contact resistance. It is also known that TiSi2 exists as a C49 phase or as a C54 phase. When using the general processing conditions for forming TiSi2, the less desirable, higher-resistivity C49 phase is formed first. In order to obtain the lower-resistivity C54 phase, a second high-temperature annealing step is required. Besides, the titanium silicide process is flawed because each titanium atom consumes two silicon atoms to form the titanium silicide. [0005] To cope with the difficulties arose due to the use of titanium silicide, nickel (Ni) has been used to replace t...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/336
CPCH01L21/26506H01L21/26586H01L29/665H01L29/6656H01L29/6659H01L29/7833
Inventor CHEN, MING-TSUNG
Owner UNITED MICROELECTRONICS CORP
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