Three-dimensional packaging scheme for package types utilizing a sacrificial metal base

Abstract

An apparatus and a method for packaging semiconductor devices. The apparatus is applicable to many types of contemporary packaging schemes that utilize a sacrificial metal base strip. Tunnels formed through an encapsulation area surrounding the device and associated bond wires are filled with a metallic conductor by, for example, electroplating, and extend bottom contact pads to an uppermost portion of the encapsulated area. The sacrificial metal base strip serves as a plating bus and is etch-removed after plating. The filled tunnels allow components to be stacked in a three-dimensional configuration.

Description

TECHNICAL FIELD [0001] The invention relates to a three-dimensional stackable semiconductor package, and more particularly, to a three-dimensional stackable semiconductor package for package types having a sacrificial metal base. BACKGROUND ART [0002] As semiconductor integrated circuit chips become more multi-functional and highly integrated, the chips include more bonding pads (or terminal pads), and thus packages for the chips have more external terminals (or leads). When a conventional plastic package that has its leads along the perimeter of the package must accommodate a large number of leads, the footprint of the package increases. However, a goal in many electronic systems is to minimize an overall size of the systems. Thus, to accommodate a large number of pins without increasing the footprint of package, pin pitch (or lead pitch) of the package must decrease. However, a pin pitch of less than about 0.4 mm gives rise to many technical concerns. For example, trimming of a pa...

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Benefits of technology

[0010] The present invention is thus, in one exemplary embodiment, a semiconductor package matrix. The semiconductor package matrix includes a plurality of three-dimensional stackable semiconductor packages arranged side-by-side in an array within the matrix and separated by kerf regions. The kerf regions are located at an outermost periphery of each of the plurality of three-dimensional stackable semiconductor packages. Each of the plurality of three-

Problems solved by technology

When a conventional plastic package that has its leads along the perimeter of the package must accommodate a large number of leads, the footprint of the package increases.

However, a pin pitch of less than about 0.4 mm gives rise to many technical concerns.

For example, trimming of a package having a pin pitch less than 0.4 mm requires expensive trimming tools, and the leads are prone to bending during handling of the package.

In addition, surface-mounting of such packages demands a costly and complicated surface-mounting process due to a required critical alignment step.

Accordingly, chip scale packages use specialized packaging materials and processes that increase package manufacturing costs.

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