ADIP demodulation method and apparatus
a demodulation method and adip technology, applied in the field of adip demodulation methods and apparatuses, can solve the problems of complex design, adip decoder errors during the demodulation process, and complex trigonometric function operations to be performed, so as to achieve good noise immunity and simplify the operation of trigonometric functions.
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[0022] The ADIP demodulation method and apparatus of the invention will be described with reference to the accompanying drawings.
[0023]FIG. 2 shows a block diagram of an ADIP demodulation apparatus of the present invention. Referring to FIG. 2, the ADIP demodulation apparatus 20 includes a slicing unit 21, a clock generator 22, a phase locked loop (PLL) 23, a channel bit generator 24, and an ADIP decoder 25.
[0024] The slicing unit 21 receives a wobble signal WOBS and slices the wobble signal WOBS into a binary signal with levels of 1 and 0 according to a slicing level. The binary signal is defined as a wobble pulse WOBPUS. The cycle length of the wobble pulse WOBPUS is 32 T, wherein T is the basic pulse length. The clock generator 22 generates a reference clock WCK according to the wobble pulse WOBPUS. The reference clock WCK is a reference signal with frequency higher than the wobble pulse WOBPUS, and the cycle length thereof is 2 T or 1 T, for example. The phase locked loop 23 g...
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