Dc/dc convertor power module package incorporating a stacked controller and construction methodology

Abstract

Methods and systems are described for enabling the efficient fabrication of small form factor power converters and also the small form factor power converter devices.

Description

TECHNICAL FIELD[0001]The present invention relates generally to power converter devices used in association with semiconductor systems. In particular, the invention refers to power converters used in DC-DC power level shifting devices and associated packages having reduced sizes and footprints. Also, the invention relates to methods of construction and packaging of these reduced size converter packages.BACKGROUND OF THE INVENTION[0002]In the field of electronic and computer devices, there is a need for converting one power level to another power level to enable the operation of various systems. The power level required for the various electronic systems is quite commonly different from a power level provided to the electronic device. Also, several different power levels may be required to power the various systems of an electronic device.[0003]Also, the same electronic device typically includes systems requiring several different power levels. Thus, in many electronic devices, there...

AI Technical Summary

Benefits of technology

[0007]In a first aspect, an embodiment of the invention describes power converter package having a high side (HS) field effect transistor (FET) mounted on a lead frame and a low side (LS) field effect transistor (FET) mounted on the same lead frame. A conductive clip can electrically couple the two FET's. And a controller device is arranged above the conductive clip. One possible implementation is illustrated in the embodiment of FIG. 2(a). The HS FET and the LS FET are electrically connected with the HS FET and the LS FET to control the device. Further aspects can include the addition of a connector arranged to provide power to the various converter systems including the controller, HS FET, and the LS FET. Such packages can be encapsulated and singulated from larger arrays of such packages.

Problems solved by technology

A problem with this arrangement is that the pair of clips are required to appropriately connect the LS FET 11, the HS FET 13, and the controller 14.

Thus, the number of components and the alignment difficulties associated with them results in increased fabrication costs and higher failure rates in the packages produced.

This large surface area is becoming increasingly problematic when faced with the decreasing size of consumer electronic devices.

This takes up valuable real estate on various electronic substrates.

So both the large footprint of prior art device and the need for two clips are disadvantages of the prior art.

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