Dynamic random access memory applied to an embedded display port

Abstract

A dynamic random access memory applied to an embedded display port includes a memory core unit, a peripheral circuit unit, and an input / output unit. The memory core unit is used for operating in a first predetermined voltage. The peripheral circuit unit is electrically connected to the memory core unit for operating in a second predetermined voltage, where the second predetermined voltage is lower than 1.1V. The input / output unit is electrically connected to the memory core unit and the peripheral circuit unit for operating in a third predetermined voltage, where the third predetermined voltage is lower than 1.1V.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]This application claims the benefit of U.S. Provisional Application No. 61 / 672,287, filed on Jul. 17, 2012 and entitled “Flexible Memory Power Supply Architecture,” and the benefit of U.S. Provisional Application No. 61 / 768,406, filed on Feb. 23, 2013 and entitled “Mixed-Low-Voltage DRAM For Embedded DisplayPort,” the contents of which are incorporated herein by reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates to a dynamic random access memory, and particularly to a dynamic random access memory applied to an embedded display port.[0004]2. Description of the Prior Art[0005]An embedded display port (eDP) published by the Video Electronics Standards Association (VESA) is used for acting as a standard display panel interface to connect external devices. For example, the embedded display port can act as an interface between a video card and a notebook panel. In addition, the embedded displ...

AI Technical Summary

Benefits of technology

This patent is about a new type of memory called a dynamic random access memory (DRAM) that can be used in a display port. The DRAM is designed to operate at lower voltages, which reduces power consumption and allows for longer battery life in portable devices. Compared to previous versions of DRAM, the new version is much more efficient, meaning it can reduce the power consumed by the system without causing an increase in the power consumed by the timing controller. This makes it a great choice for embedded display ports.

Problems solved by technology

Although the panel self refresh function can make power consumption of the graphic processing unit be significantly reduced, power consumption of the timing controller is increased due to operation of the frame buffer.

Therefore, how to design the frame buffer to reduce the power consumption of the timing controller becomes an important issue of memory manufacturers.

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