Methods for fabricating integrated circuits including barrier layers for interconnect structures

Abstract

Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming a barrier layer overlying a metal line of a metallization layer above a semiconductor substrate using an atomic layer deposition (ALD) process and a physical vapor deposition (PVD) process. A liner-forming material is deposited overlying the barrier layer to form a liner. A conductive metal is deposited overlying the liner.

Description

TECHNICAL FIELD[0001]The technical field relates generally to methods for fabricating integrated circuits, and more particularly relates to methods for fabricating integrated circuits including forming a robust barrier layer such as for a back-end-of-the-line interconnect structure.BACKGROUND[0002]Integrated circuits (ICs) typically include a plurality of semiconductor devices and interconnect wiring. Networks of metal interconnect wiring are often used to connect the semiconductor devices from the semiconductor portion of the substrate. Multiple levels of metal interconnect wiring form a plurality of metallization layers above the semiconductor portion of the substrate and are connected together to form a back-end-of-the-line (“BEOL”) interconnect structure. Within such a structure, metal lines run parallel to the substrate in the metallization layers and conductive vias run perpendicular to the substrate between the metallization layers to interconnect the metal lines.[0003]High p...

AI Technical Summary

Problems solved by technology

Unfortunately, many conventional approaches for forming the barrier layers for such interconnect structures can (1) damage the underlying dielectric material of the ILD layer, (2) produce non-conformal barrier layers that are too thin or discontinuous particularly along vertical walls or too thick particularly around corners of the ILD layer, and / or (3) form relatively low density barrier layers that have undesirably high resistivity and / or are susceptible to damage by impurities, such as oxygen (O), carbon (C), or the like, that are produced during subsequent deposition of the liner.

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