Single event latchup recovery with state protection

Abstract

An apparatus that includes a single event latchup (SEL) recovery circuit, a microprocessor operatively connected with the SEL recovery circuit, and an output maintenance circuit that maintains a state of the microprocessor prior to a power cycle of the microprocessor. The apparatus is configured to detect a SEL event or other fault via a watchdog circuit, initiate a power cycle of the microprocessor, retain a latch state from the microprocessor, and determine whether the microprocessor was restarted due to an SEL event. Responsive to determining that the microprocessor has failed to restart due to a persistent fault, the apparatus determines whether a prepower cycle limit is reached within a predetermined span of time, and selectively provide power to a load based on the latch state and the power cycle limit determination.

Description

BACKGROUND[0001]Exemplary embodiments pertain to the art of solid state power controllers, and more specifically, recovery from single event latchup with a state protection circuit.[0002]Cosmic radiation can induce Single Event Latchup (SEL) in complex electronic devices. SELs are induced by causing conduction from the circuit to the substrate that results in a 4 layer device or SCR turning on and carrying common mode current from multiple paths through the substrate to ground. This ‘latch’ results in collapsing the local power supply around the fault and disrupting the ability of the circuit to function at all. The amount of circuitry affect depends on the location of the collapse and the power supply characteristics. In aerospace this may be a particular problem due to higher radiation intensities and system criticality. Certain flight paths have increasing probability of SEL due to global magnetic variances and / or atmospheric conditions. Further, SEL may become more likely at cer...

AI Technical Summary

Benefits of technology

[0017]In the nontransitory computer-readable storage medium of any prior embodiment, selectively providing power to the load comprises transmitting a command state to a field effect transistor operable as part of a solid state power controller.

Problems solved by technology

This ‘latch’ results in collapsing the local power supply around the fault and disrupting the ability of the circuit to function at all.

In aerospace this may be a particular problem due to higher radiation intensities and system criticality.

SEL affecting the PICs may cause loss of control and protection of the SSPC and the SSPC output to shift from their proper state to an erroneous state.

SEL can only be cleared by a power cycle of the affected device.

Known methods by necessity power cycle the control circuits resulting in a loss of control state.

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