12 results about "Hard error" patented technology

Controlling a shingled magnetic recording (SMR) hard drive involves attempting a sequential write to a first sector of a sequence of sectors and, responsive to encountering a write inhibit boundary corresponding to the first sector, continuing the write to the next available sector in the sequence of sectors for the write. Thus, instead of that write inhibit triggering a hard error, the data is adaptively written to the next down-track physical sector possible, i.e., “sliding” to the next sector. This does not require an additional disk revolution thus there is negligible performance penalty. The write may be continued to the next track if necessary, and may continue through the entire zone, to maintain all the data in sequential form for performance and large block protection purposes.

The invention discloses an on-orbit failure probability estimation method for a single-particle hard error of a wide bandgap semiconductor device, and aims to support on-orbit prediction of the single-particle hard error failure probability of the wide bandgap semiconductor device. Wide bandgap semiconductor devices such as silicon carbide (SiC), gallium nitride (GaN) and the like are easy to generate hard errors such as single-particle burnout and single-particle gate-through under the radiation of high-energy particles, and the risk of the hard errors in aerospace application needs to be comprehensively predicted and evaluated. Therefore, the invention provides a method for estimating the in-orbit failure probability of the single-particle hard error of the wide bandgap semiconductor device, which considers the influence of a failure section angle and particle distribution characteristics in different orbit environments, and provides data support for model selection.

A computer-implemented method, system, and computer program product for limiting the effects of uncorrected hard errors. A soft error is detected in the least recently used (LRU) vector. A group at the tier of the LRU vector subject to the error is then recorded. A counter tracking the number of soft errors involving the group at the tier of the LRU vector subject to the soft error is updated (e.g., increased by a value of 1). If the value of the counter exceeds a threshold value, then such a soft error is deemed to be treated as a hard error. In such a situation, an error correction process is implemented for only the affected location of the LRU vector subject to the soft error. The target way is then set to include the most recently used data item in the non-errant associated groups of the LRU vector.

The application relates to the technical field of data storage, and discloses a data storage integrity verification method and system for a solid-state memory. The method comprises the following steps: collecting read-write instructions, programming and erasing cycle times, and charge retention times; performing voltage drift analysis based on the read-write instructions to obtain drift grouping data, and counting flip frequency distribution; performing storage block degradation analysis by combining the flip frequency distribution, the programming and erasing cycle times, and the charge retention times, to obtain a high-risk area; extracting a risk voltage drift amount, counting read-write interference amounts, and combining the risk voltage drift amount and the read-write interference amounts into an error feature vector; identifying a hard error type through a support vector machine model; performing reliability determination based on the hard error type and the flip frequency distribution, generating a check trigger signal, and positioning an accurate bit flip address; combining a data importance degree library to evaluate a repair priority sequence; performing data repair, periodically checking a repaired successful area, and obtaining an integrity verification report. The method improves the reliability of a storage system.

Devices, systems, and methods for improving performance of an iterative decoder in a non-volatile memory are described. An example method includes obtaining a hard error percentage, a spare byte percentage, and a total error count associated with a first page in the memory device, determining that the total error count is greater than a threshold value that is determined based on the hard error percentage and the spare byte percentage, and performing, based on the determining, a data relocation operation that relocates at least some data from the first page to a second page different from the first page.

The invention discloses a network-on-chip full error type fault-tolerant optimization system and method based on redundant transmission, belongs to the technical field of computer network communication, and aims to solve the technical problem of how to realize effective detection and response of network-on-chip soft and hard errors. Comprising a hard error detection module, a soft error detection module and a data packet synchronization module, and the soft error detection module completes SEU / MBU detection, error correction and retransmission; the hard error detection module monitors states of a link and a router in real time, outputs error identification and position information and dynamically adjusts a routing algorithm based on an error state; the data packet synchronization module solves the problem of disorder in redundant transmission and guarantees data integrity, the three modules are matched to cover full error types, an integrated system of accurate fault tolerance and data synchronization is supported, and high-reliability design is provided for manufacturing of a high-precision network-on-chip.

implemented method, system, and computer program product for limiting the effects of uncorrected hard errors. A soft error is detected in the least recently used (LRU) vector. A group at the tier of the LRU vector subject to the error is then recorded. A counter tracking the number of soft errors involving the group at the tier of the LRU vector subject to the soft error is updated (e.g., increased by a value of 1). If the value of the counter exceeds a threshold value, then such a soft error is deemed to be treated as a hard error. In such a situation, an error correction process is implemented for only the affected location of the LRU vector subject to the soft error. The target way is then set to include the most recently used data item in the non-errant associated groups of the LRU vector.

The application discloses a SiC power device on-orbit single event hard error risk probability estimation method, relates to the anti-radiation guarantee technical field of power device space application, and is based on ground radiation test and Weibull data statistical law, combines simulation software simulation of space radiation environment, can low-cost estimate the probability of single event hard error of SiC device space on-orbit application, simultaneously realizes lower difficulty, reduces the cost of on-orbit task of a spacecraft, enhances reliability during on-orbit, guarantees safety of on-orbit flight, belongs to the anti-radiation guarantee technical field of power device space application, has very high economic value, and has important significance for promoting development of a new type of space power supply.

The invention relates to the field of fault detection, in particular to a fault detection method and system for an electric meter storer, and the method comprises the steps: obtaining the weighted spatial aggregation degree of each error event in an event time sequence, carrying out the normalization of the sum of all weighted spatial aggregation degrees, and obtaining a first index, the time closeness degree of each error event in the event time sequence is obtained, the mean value of all the time closeness degrees serves as a second index, the repetition strength of each error event in the event time sequence is calculated, and the maximum value of the repetition strength serves as a third index; calculating a hard error confidence coefficient of the event time sequence according to the first index, the second index and the third index, judging that a hard error exists when the hard error confidence coefficient is not less than a threshold value, and judging that a soft error exists when the hard error confidence coefficient is less than the threshold value, thereby completing fault detection. The fault detection precision of the electric meter memory can be improved.

Techniques to boost reliability of a storage device may include performing an in-memory garbage collection operation to transfer data from a source memory block to a target memory block inside a memory device without using a memory controller. The in-memory garbage collection operation may cause soft errors in the source memory block to be converted into hard errors in the target memory block. In response to a test read of the target memory block, it may be determined that the target memory block has a failed bit count (FBC) greater than a FBC threshold by taking into account a degradation of a soft error decoder correction capability caused by the hard errors from the in-memory garbage collection operation. An external garbage collection operation may be performed on the target memory block to reclaim the target memory block.

The present application relates to the field of fault detection, in particular to a kind of fault detection method and system of electric meter memory, comprising: obtaining the spatial aggregation degree of each error event in event time series after weighting, the sum of all weighted spatial aggregation degree is normalized to obtain first index, obtain the time close degree of each error event in event time series, the mean of all time close degree is regarded as second index, the repetition intensity of each error event in event time series is calculated, and the maximum of repetition intensity is regarded as third index;According to first index, second index and third index, the hard error confidence of event time series is calculated, in response to hard error confidence is not less than threshold value, it is judged that there is hard error, in response to hard error confidence is less than threshold value, it is judged that there is soft error, and fault detection is completed.The present application can improve the fault detection precision of electric meter memory.

The invention relates to the technical field of sleeve selectors, in particular to an electric quick-change sleeve selector with a lock, and provides the following technical scheme that the electric quick-change sleeve selector comprises a base and a shell mounted at the upper end of the base, supports located on the inner side of the shell are mounted at the upper ends of the two sides of the base, and a mounting plate is jointly mounted at the upper ends of the two supports; a plurality of locking mechanisms are mounted at the upper end of the mounting plate, a position sensor is arranged on one side of each locking mechanism, and a signal lamp row is mounted at the upper end of the mounting plate; a concave part and a convex part are arranged on the side wall of the upper end of the locking rod; the steel balls are used for unlocking and locking when corresponding to the concave part and the convex part respectively; according to the invention, the upper end of the mounting plate is provided with a plurality of locking mechanisms, and one side of each locking mechanism is correspondingly provided with a position sensor and a signal lamp; the problem of hard mistake proofing of the sleeve selector in the application process is solved, the sleeve is locked and is opened only when in use, and the problems that the sleeve is taken and placed disorderly and is not operated according to a program are effectively avoided.