The invention addresses the problem of creating a high-speed, high-efficiency
photodetector that is compatible with Si
CMOS technology. The structure consists of a Ge absorbing layer on a thin
SOI substrate, and utilizes isolation regions, alternating n- and p-type contacts, and low-resistance surface electrodes. The device achieves
high bandwidth by utilizing a buried insulating layer to isolate carriers generated in the underlying substrate, high
quantum efficiency over a
broad spectrum by utilizing a Ge absorbing layer,
low voltage operation by utilizing thin a absorbing layer and narrow
electrode spacings, and compatibility with
CMOS devices by virtue of its planar structure and use of a group IV absorbing material. The method for fabricating the
photodetector uses direct growth of Ge on thin SOI or an epitaxial
oxide, and subsequent thermal annealing to achieve a high-quality absorbing layer. This method limits the amount of Si available for interdiffusion, thereby allowing the Ge layer to be annealed without causing substantial
dilution of the Ge layer by the underlying Si.