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Wiring substrate and method of manufacturing the same

a wiring substrate and manufacturing method technology, applied in the field of wiring substrates, can solve the problems of defective bonding, difficult to increase the opening area of all pads, and the inability to connect the wiring substrate and the semiconductor chip to each other,

Active Publication Date: 2015-07-14
SHINKO ELECTRIC IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This approach allows for precise control of pad depths and electrode terminal heights, enhancing bonding reliability and practicality by reducing electromigration effects and eliminating the need for precise alignment during manufacturing.

Problems solved by technology

In this method, a problem has occurred in which cracking occurs on the interface between the solder bump and the pad due to electromigration according to solder bump miniaturization and an increase in the current flowing through the solder bump in recent years and this cracking causes defective bonding.
However, it is difficult to increase the opening areas of all pads due to the miniaturization of the design.
As a result, since the electrode terminal whose height is smaller does not reach a semiconductor chip, there is a problem in that the wiring substrate and the semiconductor chip cannot be connected to each other.
In this method, however, it is necessary to mount solder balls multiple times using a mask.
For this reason, if the opening area becomes very small, high-accuracy mask alignment is required and therefore this is not practical.
For this reason, if the opening area becomes very small, high-accuracy alignment is required at the time of resist patterning and therefore this is not practical.

Method used

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  • Wiring substrate and method of manufacturing the same
  • Wiring substrate and method of manufacturing the same
  • Wiring substrate and method of manufacturing the same

Examples

Experimental program
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Effect test

first embodiment

[0026]First, the structure of a wiring substrate according to a first embodiment will be described. FIG. 1A is a cross-sectional view illustrating the wiring substrate according to the first embodiment. In addition, FIG. 1B is an enlarged view of an A portion of FIG. 1A.

[0027]Referring to FIG. 1A, a wiring substrate 10 according to the first embodiment includes a core layer 11, a wiring layer 12, a wiring layer 13, a through electrode 14, an insulating layer 15, a wiring layer 16, a solder resist layer 17, an electrode terminal 18, an insulating layer 19, a wiring layer 20, a solder resist layer 21, a first metal layer 22x, and a second metal layer 22y. In this embodiment, the insulating layer 15, the core layer 11 and the insulating layer 19 functions as a wiring substrate body. The solder resist layer 17 is formed on one surface of the wiring substrate body to cover the wiring layer 16, while the solder resist layer 21 is formed on the other surface of the wiring substrate body to...

second embodiment

[0099]In a second embodiment, an example where the area of the second surface of the first metal layer 22x exposed in the opening 21x is set to be larger than that in the first embodiment. In addition, in the second embodiment, explanation regarding the same components as in the embodiment described previously will be omitted.

[0100]FIG. 6A is a cross-sectional view illustrating a wiring substrate according to the second embodiment. Referring to FIG. 6A, in a wiring substrate 10A according to the second embodiment, the opening area of the opening 21x is larger than that in the wiring substrate 10 (refer to FIG. 1A) according to the first embodiment. In other words, the diameter Di3 of the opening 21x is larger than the diameter Di4 of the opening 21y.

[0101]In addition, the opening area of the opening 21y is the same as that in the wiring substrate 10 (refer to FIG. 1A) according to the first embodiment. That is, in the wiring substrate 10A according to the second embodiment, the are...

third embodiment

[0105]In a third embodiment, an example where a third metal layer 22z is provided on the same side as the wiring layer 16 exposed in the opening 17x will be described. In addition, in the third embodiment, explanation regarding the same components as in the embodiment described previously will be omitted.

[0106]FIG. 7 is a cross-sectional view illustrating a wiring substrate according to the third embodiment. Referring to FIG. 7, a wiring substrate 10B according to the third embodiment is different from the wiring substrate 10A (see FIG. 6A) according to the second embodiment in the following points. That is, on one side of the wiring substrate 10B, an opening 17z through which the wiring layer 16 is exposed is formed in the solder resist layer 17. In addition, the wiring layer 16 exposed in the opening 17x and the wiring layer 16 exposed in the opening 17z are electrically connected to each other, and the third metal layer 22z is formed on the wiring layer 16 exposed in the opening ...

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Abstract

A wiring substrate includes: a wiring substrate body including a first surface and a second surface; a first electrode pad including a first recess therein and formed on the first surface of the wiring substrate body; a second electrode pad including a second recess therein and formed on the first surface of the wiring substrate body; a first solder resist layer on the first surface of the wiring substrate body to cover the first and second electrode pads, the first solder resist layer including a first opening and a second opening whose opening area is larger than that of the first opening; and a first metal layer electrically connected to the first electrode pad and made of a material whose ionization tendency is smaller than that of a material of the first electrode pad. A depth of the first recess is larger than that of the second recess.

Description

[0001]This application claims priority from Japanese Patent Application No. 2012-101887, filed on Apr. 26, 2012, the entire contents of which are herein incorporated by reference.BACKGROUND[0002]1. Technical Field[0003]Embodiments described herein relate to a wiring substrate and a method of manufacturing the wiring substrate.[0004]2. Description of the Related Art[0005]A method of electrically connecting pads of a wiring substrate and electrodes of a semiconductor chip to each other through solder bumps is widely known. In this method, a problem has occurred in which cracking occurs on the interface between the solder bump and the pad due to electromigration according to solder bump miniaturization and an increase in the current flowing through the solder bump in recent years and this cracking causes defective bonding.[0006]As a method of reducing the electromigration, it is effective to increase the opening area of the pad. However, it is difficult to increase the opening areas of...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): H05K1/00H05K3/24H05K1/02H05K3/00H05K3/42
CPCH05K3/00H05K1/0296H05K3/244H05K3/429H05K2201/0769H05K2201/096
Inventor IMAFUJI, KEI
Owner SHINKO ELECTRIC IND CO LTD