Unlock instant, AI-driven research and patent intelligence for your innovation.

Package substrate

a packaging substrate and substrate technology, applied in the direction of printed circuit aspects, printed circuit stress/warp reduction, semiconductor/solid-state device details, etc., can solve the problem of warping of the package board, the difference in shrinkage factor between the resin portion and the metallic portion of the soldering pad, and the difficulty of realizing higher integrated printed wiring boards

Inactive Publication Date: 2010-04-20
IBIDEN CO LTD
View PDF37 Cites 12 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention relates to a package board for mounting an IC chip. The package board has soldering pads on its top and bottom surfaces for connecting to the IC chip and mother board. The package board is designed to reduce warping caused by shrinkage of the resin during manufacturing and by heat generated from the IC chip during usage. The invention also addresses the issue of noise caused by wires used as ground layers in multi-layer wiring boards. The package board includes capacitors to reduce noise and facilitate higher integrated printed wiring boards.

Problems solved by technology

In addition, when in an actual usage of the package board 600 on which an IC chip is mounted, the heat generated from the IC chip makes the package board expand and shrink repetitively, causing a difference of shrinkage factor between the resin portion and the metallic portion of those soldering pads.
And, this results in warping of the package board 600 sometimes.
In addition, such the multi-layer wiring board needs a space for wiring in itself and this makes it difficult to realize higher integrated printed wiring boards.
On the other hand, the soldering pads on the mother board side surface of the package board are large, so the rate of the metallic portion occupied by those soldering pads is also large.
In other words, the conventional package board, where a soldering pad is connected to a via-hole through a wire and a soldering bump is formed on a soldering pad, cannot avoid crack-cased breaking of a wire connecting via-holes to soldering pads.
A soldering bump is thus disconnected from a via-hole due to such a crack generated inside the package board.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Package substrate
  • Package substrate
  • Package substrate

Examples

Experimental program
Comparison scheme
Effect test

first embodiment

(First Embodiment)

[0049]Hereunder, a configuration of the package board in the first embodiment of the present invention will be described with reference to FIG. 1. FIG. 1 shows a cross sectional view of the package board in the first embodiment. The package board in this first embodiment is a so-called IC package provided with an IC (not illustrated) mounted thereon and attached to a mother board (not illustrated). The package board is provided with soldering bumps 76U on its top surface and soldering bumps 76D on its bottom surface. Each of the soldering bumps 76U is connected to a soldering bump of the IC and each of the soldering bumps 76D is connected to a soldering bump of the mother board. Both soldering bumps 76U and 76D are used to pass signals between the IC and the mother board, as well as relay a supply power from the mother board to other parts.

[0050]On both top and bottom surfaces of a core board 30 of the package board are formed inner layer copper patterns 34U and 34...

second embodiment

(Second Embodiment)

[0105]Hereunder, a configuration of the package board in the second embodiment of the present invention will be described with reference to FIGS. 10 to 12. FIG. 10 is a cross sectional view of the package board in the second embodiment. FIG. 11A is a top view of the package board and FIG. 11B is a bottom view of an IC chip mounted on the package board. FIG. 12 illustrates how the IC chip 80 is mounted on the top of the package board shown in FIG. 10 as a cross sectional view of the package board mounted on a mother board 90. The package board is provided with soldering bumps 76U on its top surface and soldering bumps 76D on the bottom surface as shown in FIG. 12. Those bumps are connected to the bumps 82 of the IC chip 80 and the bumps 92 of the mother board 90 respectively. Those bumps are used to pass signals between the IC chip 80 and the mother board 90, as well as relay a supply power from the mother board to other parts.

[0106]As shown in FIG. 10, on both top...

third embodiment

(Third Embodiment)

[0114]Hereunder, a configuration of the package board in the third embodiment of the present invention will be described with reference to FIG. 13.

[0115]The core board 30 of the package board 300 is provided with inner layer copper patterns 34U used as signal lines and formed on its top surface, as well as inner layer copper patterns 34D used as signal lines and formed on its bottom surface respectively. In the upper layer of each inner layer copper pattern 34U is formed a conductor circuit 58U that forms a power supply layer with the interlaminar resin insulating layer 50 therebetween. In the upper layer of each conductor circuit 58U is formed an outermost layer conductor circuit 158 with the interlaminar resin insulating layer 150 therebetween, as well as a via-hole 160U through the interlaminar resin insulating layer 150. In the via-hole 160U is formed a soldering bump 76U. In other words, the package board is composed in the third embodiment so that a soldering...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

According to the package board of the present invention, each soldering pad formed on the top surface of the package board, on which an IC chip is to be mounted, is small (133 to 170 μm in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also small. On the other hand, each soldering pad formed on the bottom surface of the package board, on which a mother board, etc. are to be mounted, is large (600 μm in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also large. Consequently, a dummy pattern 58M is formed between conductor circuits 58U and 58U for forming signal lines on the IC chip side surface of the package board thereby to increase the metallic portion on the surface and adjust the rate of the metallic portion between the IC chip side and the mother board side of the package board, protecting the package board from warping in the manufacturing processes, as well as during operation.

Description

[0001]This application is the national phase of international application PCT / JP98 / 04350 filed Sep. 28, 1998 which designated the U.S.BACKGROUND ART[0002]The present invention relates to a package board on which an IC chip is to be mounted, more particularly, a package board provided with soldering pads on its top and bottom surfaces. The soldering pads are connected to the IC chip, as well as to boards such as a mother board, a sub-board, etc.[0003]A highly integrated IC chip is mounted on the package board and connected to a mother board, a sub-board, etc. Hereunder, a configuration of this package board will be described with reference to FIG. 23, which is a. cross sectional view of the package board 600 provided with an IC chip 80 and mounted on a mother board 90. The package board 600 includes conductor circuits 658A and 658B formed on both surfaces of its core board 630. Furthermore, conductor circuits 658C and 658D are formed in the upper layer of the conductor circuits 658A ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(United States)
IPC IPC(8): H05K1/14H01L23/498H05K3/46H01L23/50H05K1/02H05K1/11H05K3/34
CPCH01L23/49816H01L23/49827H01L23/49838H01L23/50H05K1/0271H05K1/114H01L2924/01046H01L2924/01078H01L2924/01079H01L2924/15173H01L2924/15311H05K1/116H05K3/3457H05K3/4602H05K3/4644H05K2201/09472H05K2201/09509H05K2201/09627H05K2201/09781H05K2201/10734H01L2224/73204H01L2224/16225H01L2224/32225H01L2924/00H01L2924/00012H01L2924/01019H01L2224/05573H01L2224/05568H01L2924/00014H01L2224/05599
Inventor ASAI, MOTOOMORI, YOJI
Owner IBIDEN CO LTD