Single-block virtual frame buffer translated to multiple physical blocks for multi-block display refresh generator

Abstract

A graphics controller for a System-On-a-Chip (SOC) used with a battery-powered device allows for reduced-power display modes. The microprocessor writes to a frame buffer that is a single, contiguous address block in virtual memory. A memory management unit (MMU) translates frame-buffer address to multiple physical blocks. The graphics controller fetches pixels from the multiple physical blocks, including a block in an on-chip memory and a block in an external memory. In a low-power mode, pixels are only fetched from the lower-power on-chip memory and not the higher-power external memory. A smaller display window is defined and pixels outside the window are replaced by dummy data, .eliminating external-memory fetches. The smaller display window falls within the first block in the on-chip memory. Status and other information can be displayed in the smaller display window during stand-by modes, while a full-screen of data is displayed for full-power modes.

Description

BACKGROUND OF INVENTION[0001]Notice: More than one reissue application has been filed for the reissue of U.S. Pat. No. 6,680,738. The reissue applications are the present application, which is a broadening reissue of the '738 Patent, and application Ser. No. 12 / 789,856, which is a divisional broadening reissue of the '738 Patent.[0002]This invention relates to computer-graphics systems, and more particularly to frame buffers split among multiple blocks in memory.[0003]An interesting variety of small consumer devices are appearing. Portable computing and / or communication devices such as the personal digital assistant (PDA), Pocket PC, and smart cellular phones have an astonishing computing power for such small devices. These portable, often hand-held, computing devices often use a very-large-scale-integration (VLSI) chip that includes a microprocessor or central processing unit (CPU), memory, and I / O controllers on a single silicon chip known as a System-On-a-Chip (SOC).[0004]These c...

AI Technical Summary

Benefits of technology

"The present invention relates to improving frame buffers in computer-graphics systems. The invention allows for a frame buffer to be split among multiple blocks of memory, with a graphics controller that can re-assemble pixels from the multiple blocks. This allows for a larger frame buffer without increasing the size of the overall device, which is important for portable and low-cost consumer devices. The invention also allows for a high-power display mode that splits the frame buffer between the on-chip SRAM and external DRAM, and a low-power display mode that only uses the on-chip SRAM. The invention further allows for a single, contiguous block of memory to programs executing on the CPU, and avoids the need for rewriting programs to support a split frame buffer."

Problems solved by technology

However, larger, more colorful displays running at higher-resolution modes may require a large frame buffer to store a large number of pixels.

However, larger on-chip SRAMs increase the SOC die size and reduce manufacturing yield.

The SOC may even become too expensive for many low-cost consumer devices.

Re-writing the many programs that can run on the CPU to allow for a split frame buffer is not practical.

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