Input/output cell with robust electrostatic discharge protection
An electrostatic discharge, unit cell technology, used in circuits, transistors, electrical components, etc.
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[0032] In order to describe the content of the present invention in detail, an embodiment is proposed together with the drawings as a reference for illustrating the implementation of the present invention.
[0033] Figure 6 is a circuit diagram showing the layout of the first embodiment according to the present invention. In the first embodiment, an I / O unit cell 66 and a bonding pad 68 are included. Figure 7A to Figure 7C respectively Figure 6 , the sectional view divided by the tangent lines AA, BB and CC. Such as Figure 6 As shown, an interdigitated structure NMOS transistor is used as the description of the embodiment, however, the present invention can also be implemented by using an interdigitated structure PMOS transistor.
[0034] exist Figure 6 In this example, the interdigitated structure NMO includes a plurality of gate fingers 60 , a plurality of source regions 64 and a plurality of drain regions 62 . The interdigitated NMOS transistor is formed in an ac...
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