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Input/output cell with robust electrostatic discharge protection

An electrostatic discharge, unit cell technology, used in circuits, transistors, electrical components, etc.

Active Publication Date: 2008-12-24
WINBOND ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In general, the internal circuitry 12 is generally more vulnerable to electrostatic discharge than the I / O cells

Method used

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  • Input/output cell with robust electrostatic discharge protection
  • Input/output cell with robust electrostatic discharge protection
  • Input/output cell with robust electrostatic discharge protection

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0032] In order to describe the content of the present invention in detail, an embodiment is proposed together with the drawings as a reference for illustrating the implementation of the present invention.

[0033] Figure 6 is a circuit diagram showing the layout of the first embodiment according to the present invention. In the first embodiment, an I / O unit cell 66 and a bonding pad 68 are included. Figure 7A to Figure 7C respectively Figure 6 , the sectional view divided by the tangent lines AA, BB and CC. Such as Figure 6 As shown, an interdigitated structure NMOS transistor is used as the description of the embodiment, however, the present invention can also be implemented by using an interdigitated structure PMOS transistor.

[0034] exist Figure 6 In this example, the interdigitated structure NMO includes a plurality of gate fingers 60 , a plurality of source regions 64 and a plurality of drain regions 62 . The interdigitated NMOS transistor is formed in an ac...

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Abstract

An ESD protection device capable of improving the robustness of electrostatic discharge (ESD). The ESD protection device includes a pad, an interdigitated MOS, a wellstripe and a doped segment. The bonding pad is disposed on a semiconductor substrate of a first conductivity type. The interdigitated MOS is disposed on the above-mentioned semiconductor substrate and includes multiple drain regions, multiple source regions and multiple channel regions. Each drain region is of a second conductivity type and coupled to the pad. Each source region is also of the second conductivity type and is coupled to a power rail. Among the plurality of channel regions in the semiconductor, each channel region is substantially parallel to each other, and each channel region is disposed between one of the source regions and one of the drain regions. The well-shaped region is of the second conductivity type, and is disposed in the semiconductor and maintains an intersection angle with the plurality of channel regions. The doped segment is of the first conductivity type and is arranged in the well-shaped region. In addition, the doped section is coupled to the pad.

Description

technical field [0001] The present invention relates to an electrostatic protection device (Electrostatic discharge, ESD) for an integrated circuit (Integrated circuit, IC), in particular to an input / output (Input / output, I / O) unit cell, which can When ESD occurs, a uniform ESD discharge current is generated. Background technique [0002] Among various electronic products, ESD has become one of the factors that must be overcome for product stability. In the human body, machines or electronic devices, electrostatic charges exceeding thousands of volts can be accumulated. At this time, if a grounded object is touched, electrostatic discharge will occur. Static electricity will release energy through a conduction path. At this time, if any device along this path does not have good electrostatic protection, it will be damaged due to electrostatic discharge. [0003] It is known that there are some test models, such as Human Body Mode (HBM) and Machine Mode (MM), etc., for simu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/60H01L27/02H01L23/62
CPCH01L27/0266H01L2924/0002H01L2924/00
Inventor 林锡聪
Owner WINBOND ELECTRONICS CORP