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Encoding circuit for triggering signals of PWM three level inverter and control of compensation of the dead zone

A technology of three-level inverter and decoding circuit, which is applied in the field of power transformation, can solve problems such as the complexity of 12-way PWM control signals, achieve wide industrial applicability, ensure safe operation, and reduce harmonic content

Inactive Publication Date: 2009-03-04
TONGJI UNIV
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Problems solved by technology

[0003] The purpose of the present invention is to provide a decoding circuit for the trigger signal of a PWM three-level inverter, to solve the technical problem of generating 12 channels of PWM control signal complexity in the prior art, and to ensure that the switching devices in the same bridge arm are switching Time interlock and eliminate the technical problem of the dead zone effect caused by the delay caused by the decoding circuit itself

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  • Encoding circuit for triggering signals of PWM three level inverter and control of compensation of the dead zone
  • Encoding circuit for triggering signals of PWM three level inverter and control of compensation of the dead zone
  • Encoding circuit for triggering signals of PWM three level inverter and control of compensation of the dead zone

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Embodiment Construction

[0024] The decoding circuit of the present invention is composed of an encoder and three groups of logic delay circuits. The three pairs of PWM modulation signals output by the encoder are respectively input into a corresponding group of logic delay circuits, and after simple logic operation and delay processing, the control signals for controlling the switching devices of the three-phase bridge arms of the inverter are output. Since each group of logic delay circuits is the same, they are all composed of a two-input AND gate AND, a two-input OR gate OR, two NOT gates and four delayers DELAY. Therefore, a detailed explanation will be given by taking one group as an example.

[0025] see Figure 4 As shown, in order to perform PWM modulation on the three-level inverter, the encoder (not shown in the figure) sends a pair of modulation signals to each phase of the inverter circuit, that is, the first modulation signal PWM1 and the second modulation signal PWM2. The first modula...

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Abstract

The decoding circuit is composed of the encoder and tree groups of logic delay circuit. Each group is composed of the AND gate, the OR gate, two NOT gate and four delay circuits. The modulating signal PWM2 generated by the encoder are connected to the corresponding logic delay circuit to achieve the delay by logic operation. The AND gate is connected with the NOT gate and decelerator to output the control signal S1; The AND gate is connected with the decelerator directly to output the control signal S3. The OR gate is connected with the OR gate and the decelerator respectively to output the control signal S2 and S4.

Description

Technical field: [0001] The invention relates to power transformation, in particular to a decoding circuit for a PWM trigger signal of a three-level inverter. Background technique: [0002] With the development of industry and transportation, not only the demand for electricity is increasing, but also the performance requirements for power devices are getting higher and higher. In recent years, the inverter, as a kind of sinusoidal alternating output power device that can convert DC input power into a voltage and frequency variable output power device, is constantly expanding its application range. At the same time, the influence of the modulation and control of the inverter on its operation performance has gradually attracted the general attention of the industry. Especially now high-power inverters tend to use gate-controllable switching devices as the main power switching devices of the inverter, and use the width of the modulated trigger pulse signal to realize the turn...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H02M7/48H02M1/08
Inventor 李耀华李海山葛琼璇张树田王晓新
Owner TONGJI UNIV
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