Package structure of crystal particle and manufacturing method thereof
A technology of packaging structure and packaging method, which is applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve problems such as difficulties, time-consuming, and inability to meet the needs of planting bumps on a single chip, and achieve saving The effect of timing
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[0034] Please refer to Figure 2A to Figure 2C , which represents a schematic diagram of the manufacturing method of the chip according to the present invention. Please refer to Figure 2A , firstly, a flat panel 20 is provided, the flat panel 20 has a first surface 201 and a second surface 202, the second surface 202 is relative to the first surface 201, wherein in an embodiment, the first surface 201 is a circuit surface, and in other In application, the second surface 202 may also be a circuit surface. Then, form a plurality of chips 21 on the first surface 201 of the flat plate 20, the chips 21 have a first surface 211 and a second surface 212, the second surface 212 is relative to the first surface 211, wherein the chips 21 are arranged in an array arranged and adhered on the first surface 201 of the plate 20 by using resin.
[0035] Please refer to Figure 2B , forming a plurality of bumps 22 on the first surface 211 of the chip 21 , wherein a preferred material of t...
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