Integrated circuit bipolar transistor performance regulation method and method of manufacture
A technology of bipolar transistors and integrated circuits, applied in semiconductor/solid-state device manufacturing, circuits, electrical components, etc., to avoid latch-up effects and ensure performance requirements
Inactive Publication Date: 2009-12-30
SEMICON MFG INT (SHANGHAI) CORP +1
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Problems solved by technology
However, in the existing integrated circuit manufacturing method, changing the performance of the bipolar transistor in the integrated circuit will inevitably cause a change in the performance of the corresponding MOS device, that is, it is impossible to realize the performance of the MOS device in the integrated circuit. Performance tuning of bipolar transistors (including parasitic bipolar transistors)
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[0045] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.
[0046] The processing method of the present invention can be applied to various occasions, and can utilize many suitable materials to make, and below is to illustrate by preferred embodiment, certainly the present invention is not limited to this specific embodiment, the person in the art Common substitutions known to those of ordinary skill undoubtedly fall within the protection scope of the present invention.
[0047] Secondly, the present invention is described in detail using schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, which should not be ...
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The invention discloses an adjusting method and a manufacturing method of bipolar transistor performance in a bulk silicon CMOS integrated circuit. The adjusting method includes steps of defining the deviation amount of the performance parameters of a bipolar transistor in an integrated circuit, defining the ion implantation technological parameters of the deepest layer of a doped area in the integrated circuit according to the deviation amount of the performance parameters, and implanting ions to the deepest layer of the doped area according to the ion implantation technological parameters. The adjusting method and manufacturing method flexibly adjust the performance of the bipolar transistor without influencing the performance of an MOS element, which can meet different application requirements of the bipolar transistor in an integrated circuit, and can be used to avoid latch-up in circuit.
Description
technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for adjusting the performance of a bipolar transistor in a bulk silicon CMOS integrated circuit and a manufacturing method thereof. Background technique [0002] The semiconductor manufacturing process is a planar manufacturing process that forms a large number of various types of complex devices on the same substrate and interconnects them to have complete electronic functions. With the rapid development of Ultra Large Scale Integration (ULSI, Ultra Large Scale Integration), the integration of chips is getting higher and higher, and the size of components is getting smaller and smaller. high demands. In order to further improve the overall performance of integrated circuits and improve the monitoring of integrated circuit technology, bipolar transistors (usually formed by inherent parasitic bipolar transistors in integrated circuits) are formed in i...
Claims
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IPC IPC(8): H01L21/82H01L21/8238H01L21/331H01L21/265
Inventor 杨勇胜
Owner SEMICON MFG INT (SHANGHAI) CORP