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Plasma display panel apparatus and method for driving the same

A display panel and plasma technology, applied in static indicators, instruments, etc., can solve problems such as difficulty in ensuring auxiliary elimination pulse design margin, unsolved abnormal initialization discharge, faulty maintenance discharge, etc., to achieve good image display performance, supervise normal The effect of maintaining discharge and solving discharge delay

Inactive Publication Date: 2010-01-27
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, it is difficult to set the width of the narrow pulse. If it is too narrow, the elimination discharge of the excess wall voltage will not be performed due to the discharge delay. Conversely, if the pulse width is too wide, the wall voltage will accumulate and false sustain discharge will occur.
Therefore, it is difficult to ensure a design margin for the auxiliary cancellation pulse, and it is not desirable to rely on the pulse
[0017] Fourth, not limited to the technology disclosed in Patent Document 2, there are also problems in the development of high-definition PDPs with full-spec high-vision (full-spec high-vision), that is, resolutions above HD (High Definition)
[0018] In this way, the problem of abnormal initializing discharge in the initializing period remains unsolved in the driving method of the PDP.

Method used

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  • Plasma display panel apparatus and method for driving the same
  • Plasma display panel apparatus and method for driving the same
  • Plasma display panel apparatus and method for driving the same

Examples

Experimental program
Comparison scheme
Effect test

Embodiment approach 1

[0073] (Overall configuration of PDP device)

[0074] figure 1 It is a partial perspective view showing a configuration example of a PDP. The PDP 1 shown in this figure is generally the same as the conventional configuration described above, and redundant descriptions are appropriately omitted. The configurations of the PDP and its driving device are substantially the same in each of the embodiments described later.

[0075] The PDP 1 is configured such that a front substrate (front panel: front panel) 2 and a rear substrate (back panel: rear panel) 3 made of panel glass are arranged to face each other, and a discharge space is formed therebetween.

[0076] On a single main surface of the front substrate 2, a plurality of scan electrodes SCN1-SCNn and SUS1-SUSn constituting a display electrode pair are arranged in parallel to each other. Dielectric material layer 6 and protective layer 7 are sequentially stacked so as to cover the plurality of scan electrodes SCN1 to SCNn ...

Embodiment approach 2

[0169] Figure 8 It is a diagram showing driving waveforms in the initialization period of all cells of the PDP according to Embodiment 2 of the present invention.

[0170] The second embodiment is characterized in that Figure 4 The driving waveforms applied to the electrodes representing the PDP during initialization of all cells are as Figure 8 As shown, between the first half and the second half of the initializing period of all cells, an excess wall voltage cancel period is provided in which a vertical potential change waveform (voltage change pulse) is applied to sustain electrodes SUS1 to SUSn.

[0171] The operations and subfield configurations of the first half and the second half of the initialization period in Embodiment 2 are the same as those in Embodiment 1, so descriptions thereof are omitted, and an excess wall voltage erasing period different from Embodiment 1 will be described.

[0172] Figure 8 In (a), after the end of the first half of the initializatio...

Embodiment approach 3

[0181] Figure 9 It is a diagram showing driving waveforms in the initialization period of all cells of the PDP according to Embodiment 3 of the present invention.

[0182] The third embodiment is characterized in that Figure 4 The driving waveforms applied to the electrodes of a typical PDP during initialization of all cells are as Figure 9 As shown, between the first half and the second half of the initializing period of all cells, an excess wall voltage canceling period is provided in which a waveform of a vertical potential change is applied to data electrodes D1 to Dm.

[0183] The operations and subfield configurations of the first half and the second half of the initialization period in the third embodiment are the same as those in the first embodiment, so descriptions thereof are omitted, and the excess wall voltage erasing period, which is different from that in the first embodiment, will be described.

[0184] Figure 9 In (a), after the first half of the initial...

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Abstract

A plasma display panel and a method for driving the same, wherein the problems of erroneous discharges and write discharge delays, which are caused by accidental strong discharges occurring during an initialization period, are suppressed, without using any auxiliary blanking pulses after the end of the blanking interval, thereby achieving an image display having no flicker but having a good quality. For this purpose, upper and lower potential variation waveforms (voltage variation pulses) are applied to at least one of three electrodes, that is, a scanning electrode, a sustain electrode and a data electrode, between the former half of the initialization period by an acclivity waveform voltage and the latter half of the initialization period by an declivity waveform voltage.

Description

technical field [0001] The present invention relates to a plasma display panel device and its driving method, in particular to a technique for preventing misdischarge during initialization. Background technique [0002] A plasma display panel (hereinafter referred to as 'PDP') is arranged so that two front panels and a rear panel face each other through a plurality of partition walls, and red (R), green (G), and blue ( B) Phosphor layers of various colors are filled with discharge gas in the discharge space which is the gap between the two glass plates. On the front panel side, a plurality of pairs of display electrodes including a scan electrode and a sustain electrode are formed on the panel glass surface. In addition, on the rear panel side, a plurality of data (address) electrodes are arranged in parallel on the glass surface of the other panel so as to interpose the discharge space and be perpendicular to the display electrode pairs. For each of these electrodes, usin...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G09G3/28G09G3/20G09G3/288G09G3/291G09G3/292G09G3/298
CPCG09G2310/066G09G3/2927G09G3/2022G09G3/292G09G3/296
Inventor 赤松庆治小川兼司植田光男
Owner PANASONIC CORP