PI solution method based on IC package PCB co-design

Abstract

The invention relates to the field of very large scale integrated (VLSI) circuit technique, especially a PI solving method for IC-package-PCB cooperative design for solving power supply integrity problem in back-end design, comprising: 1) building a circuit model suitable for VLSI PI analysis; 2) analyzing and extracting parasitical parameters corresponding to the circuit mode; 3) determining design indexes in the PI design; 4) utilizing EDA tool and owned algorithm model to make accurate simulation and calculation; 5) on the premise of considering power supply integrity, according to the PI design indexes and simulated results, quickly determining a proper number of I / Os of power supply.

Description

technical field [0001] The invention relates to the technical field of very large-scale integrated circuits (VLSI), in particular to a PI solution method of IC-packaging-PCB collaborative design for solving power integrity problems in back-end design. Background technique [0002] As the working speed and integration of integrated circuits (ICs) are getting higher and higher, the chip functions are getting more and more, the chip power consumption is getting bigger and bigger, and the flipping frequency of the unit is getting higher and higher, which also brings chip input and output increase in pins. These may cause noise on the power supply and ground, resulting in a decrease in the performance of the integrated circuit chip, or even malfunction of the function, which brings about the problem of power integrity, which will affect the convergence of the timing, the success of the design, and the power consumption. The size and stability of the chip work. While the process...

AI Technical Summary

Problems solved by technology

[0007] The output unit is the main noise source of synchronous switching noise, because the large switching current flowing through its ground wire and package parasitic inductance changes very rapidly, and the package parasitic inductance is also relatively large, so the noise generated is serious

As the scale of integrated circuits becomes larger, it is difficult for designers to model and simulate simultaneous switching noise for the entire design

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