1133 results about "Circuit models" patented technology

A simulation system is described for computing the overall signal generated in a substrate by a digital system comprising a plurality of gates associated with the substrate, wherein each gate is configured to perform a switching event. Output of a transistor-level model is compared with output of a lumped circuit model for each gate and the substrate, and signal contributions from each gate and switching event are determined based on the comparison. The system determines switching event signals for each of the plurality of gates. The signal contributions and the switching event signals are combined, and a combined lumped circuit model is derived based on a combination of lumped circuit models of the plurality of gates. The overall signal is computed based on the combined gate signal contributions and switching event signals, which are configured as an input to the combined lumped circuit model.

A method and apparatus for generating a noise circuit model for an electronic circuit includes analyzing the electronic circuit to determine a first circuit parameter for a victim and aggressor circuits and a second circuit parameter for the aggressor circuits, ordering the aggressor circuits based on their first and second circuit parameters, setting a current model parameter of the circuit model to an initial value, selecting a first aggressor circuit, determining whether to reduce the selected aggressor circuit into a virtual attacker model based on its first circuit parameter, updating the current model parameter in accordance with either the selected aggressor circuit or its virtual attacker model to be inserted, inserting either the selected aggressor circuit or its virtual attacker model to the circuit model, for each aggressor circuit.

A system and method for estimating internal parameters of a lithium-ion battery to provide a reliable battery state-of-charge estimate. The method uses a two RC-pair equivalent battery circuit model to estimate the battery parameters, including a battery open circuit voltage, an ohmic resistance, a double layer capacitance, a charge transfer resistance, a diffusion resistance and a diffusion capacitance. The method further uses the equivalent circuit model to provide a difference equation from which the battery parameters are adapted, and calculates the battery parameters from the difference equation.

A sub-circuit based extraction method which extracts a multi-finger MOS transistor directly as a sub-circuit is described. By adding three marking layers, the method provides the layout extracted netlist with a complete list of device geometric parameters corresponding to the device properties as presented in the sub-circuit model based schematic netlist. By performing a layout-versus-schematic comparison based on all geometric parameters extracted, the layout checking is performed in a complete and accurate way where each device parameter is checked against the corresponding design schematic. This complete and accurate geometric parameter comparison enhances the confidence level of the layout physical verification.

A lithium battery state of charge (SOC) estimation method is used for lithium battery energy storage equipment with a micro controller and a storer and used for correction of practical capacity of a lithium battery. The method comprises the following steps: utilizing an electromotive force method to establish a battery circuit model; determining the functional relationship between the electromotive force and the SOC; calculating the current SOC number value according to the obtained relationship between current and voltage; accurately calculating the original value SOC0 of the SOC according to the relationship between current and voltage; calculating the current SOC value by using a current integration in a real time manner; correcting the estimation values obtained through the electromotive force method and the current integral mensuration by using an expanded Kalman model; realizing real-time on-line accurate estimation for battery packs by using expanded Kalman filtering circular iterative computations.

The invention discloses a lithium battery SOC estimation method of off-line data segmentation correction. The method is mainly applied to a battery management system of an electric vehicle and is used for correcting an actual capacity of a lithium battery and eliminating an accumulation error of a traditional ampere-hour integral method. The method comprises the following steps of establishing a battery equivalence circuit model; acquiring an OCV-SOC curve; using a terminal voltage response curve at the time that battery discharging is ended to carry out off-line parameter identification on the equivalence circuit model; calculating a battery health state SOH; using an ampere-hour integral method to calculate a current value of the SOC in real time; using the battery health state to correct a SOC value; using off-line data to carry out segmentation elimination on the accumulation error in the ampere-hour integral method. By using the method of the invention, the battery SOC can be accurately estimated and the accumulation error of battery SOC estimation performed through using the ampere-hour integral method is eliminated.

Methods and apparatuses for transient analyses of a circuit using a hierarchical approach. In one embodiment, the cells are grouped locally on the power supply network according to average power dissipation. A time varying current of each cell group is estimated using a probabilistic approach to represent the cell group so that the probability of a more severe waveform for the current of the cell group is under a certain level. For example, the cells in a group are partitioned as switching cells and non-switching cells using cell toggle rates for the determination of the time varying current. The circuit model of the power supply network includes the current sources according to the estimated time varying currents for the cell groups, the power supply wire resistance, the power supply to ground wire capacitance, well capacitance and the de-coupling capacitance from non-switching cells.

A system and method for analyzing timing and noise effects in a hybrid circuit which contains a plurality of electrical components. The timing and noise effects for the hybrid circuit are generated by simulating electrical conditions within a hybrid circuit model. The hybrid circuit model is constructed by creating and integrating analog and behavioral models from the plurality of electrical components. The timing and noise effects remain accurate even at high printed circuit board/multi-chip module clock speeds, thereby ensuring that a user is able to construct an optimal design for any one of the plurality of electrical components.

Integrated circuit models having associated timing and tag information therewith for use with electronic design automation to effectively model timing exception information. The present invention includes a circuit block model which allows automated circuit optimization to be performed on extremely large circuits without the need to load all of the details of the circuit into computer memory. The circuit models of the present invention effectively model timing including timing exception information. The model of the present invention is associated with command information, e.g., textual commands, that describe tags (which model exceptions) and arrival and required times associated with the tags. Specifically, for the input pins of a circuit to be modeled, the present invention writes out a command defining each unique required tag associated with an input pin and also writes out commands associating each required tag with its input pin. For the output pins of a circuit to be modeled, the present invention writes out a command defining each unique arrival tag associated with an output pin and also writes out commands associating each arrival tag with its output pin. The tag, arrival and required information is then associated with the model. Timing exceptions are thereby effectively and efficiently modeled using this process. The present invention also includes various circuit optimization processes that utilize the above described circuit model with command information. These circuit optimizations can be used for incremental optimization of a large circuit.

The invention discloses a SOC-SOH joint on-line real-time estimation and on-line modification method, the method comprises an SOC hardware pre-estimation module and a lithium battery equivalent-circuit parameter correction module, wherein the SOC hardware pre-estimation module utilizes a Hall current sensor to convert a heavy current signal into a low voltage signal, noise filtering is performed on the signal through a band-pass filter, the filtered signal is transmitted to an RC integrator to indirectly realize the integral for the current signal, and an integral signal acquired by an ADC is transmitted to an MCU chip to correct; the lithium battery equivalent-circuit parameter correction module comprises a square-wave pulse switch current source and a controllable electronic load, the square-wave pulse switch current source or the controllable electronic load is utilized to perform charge or discharge test on the lithium battery, the ADC is utilized to acquire terminal voltage of a battery pack, and according to the input response of charge or discharge curve, parameters of a battery equivalent model in a charge-discharge process are corrected. According to the invention, the method overcomes a circuit model parameter correction problem and realizes SOC-SOH real-time accurate on-line joint estimation.

The invention relates to a dynamic capacity increasing method for an oil-immersed transformer, and belongs to the field of transformers. The method includes the steps that heat conduction process in the transformer is simplified into a circuit model; winding hot-spot temperature, top oil temperature, average oil temperature, average winding temperature of the transformer under the current load condition are calculated; according to the limit that the winding hot-spot temperature does not exceed 140 DEG C, whether temperature in the transformer will exceed the limit temperature or not under the current load and environment conditions is calculated, whether a temperature limit value is reached or not if long-term emergency loads or short-term emergency loads occur at the moment is calculated, and if the temperature in the transformer possibly exceeds the limit value of the short-term emergency loads, the time for reaching the limit value and the finally reached steady state temperature are calculated to serve as alarm signals; if it is monitored that the temperature will exceed the standard within t minutes, an early-warning signal is sent out, certain time delay is set, and if the loads are not reduced within the set time delay, a cooling fan of the transformer is turned on. Long-term continuous operation of cooling equipment can be avoided, and operation life of the cooling equipment is prolonged.

The invention discloses a cable fault positioning simulation method using time domain reflectometry. The method includes the following steps that S100, a cable distributed parameter circuit model is established through Pspice simulation software according to the operating parameter of a cable to be detected; S200, an equivalent circuit model of a pulse generator and an equivalent circuit model of an oscilloscope are established through the Pspice simulation software, wherein different pulse widths can be set in the pulse generator; S300, the model of coaxial cable transmission lines connected among the cable to be detected, the pulse generator and the oscilloscope and the model of coaxial cable transmission line connecting points are established; S400, the simulation system is made to operate according to an established artificial circuit model, the traveling wave propagation process of any node is tested, and meanwhile the actual reflected impulse waveform of the cable to be detected can be tested. By the adoption of the cable fault positioning simulation method, the operation accuracy of simulation experiments is improved, and extremely high application value is achieved to application and study of a time domain pulse method.

The invention provides a quantitative estimation method of a lithium ion power battery internal short-circuit degree, and the quantitative estimation method belongs to the technical field of batteries. The invention provides the estimation method based on a battery electrochemical model, which identifies model parameters by adopting an optimization method, and through establishing an internal short-circuit equivalent circuit model and utilizing variations of half-cell voltage along with the state of charge (SOC) and a discharge voltage curve of an internal short-circuit battery, thereby acquiring an estimated value of internal short-circuit resistance. The quantitative estimation method has good repeatability, high adaptability, can be used for evaluating the internal short-circuit degree of the battery with triggered internal short-circuit, and can complete the estimation of magnitude of the internal short-circuit resistance in different battery operating states. The quantitative estimation method provides valid internal short-circuit evaluation data for an internal short-circuit early detection algorithm, and has important practical significance.

The invention relates to a real-time on-line estimation method for the internal resistance of a secondary battery, belonging to the technical field of secondary battery energy storage system control. The real-time on-line estimation method for the internal resistance of a secondary battery only needs to provide the terminal voltage and the load current of the battery without adding other auxiliary hardware circuits. The real-time on-line estimation method comprises the following steps of: constructing a state equation and an observation equation required for an algorithm by using the working principle of an extended Kalman filter based on an equivalent circuit model of a standard battery, taking the open-circuit voltage (VOC), the ohmic resistance (RO), the polarization resistance (RP) and the polarization current (IP) of the battery as estimated quantities, and taking the real-time measurements of the terminal voltage (VL) and the load current (IL) and a time interval delta t between two times of sampling as known quantities; and selecting a process excitation noise covariance and a measurement noise covariance according to the accuracy of a transducer, performing updating through iteration, and further estimating the ohmic resistance and the polarization resistance of the measured secondary battery in real time. Compared with the traditional resistance testing method, the real-time on-line estimation method has the advantages of real-time on-line estimation and good stability, and no hard testing circuit is additionally required.

Methods and systems are disclosed for characterizing the response of a subsurface resistivity measurement to determine a characteristic of a borehole within the subsurface and/or a characteristic of a formation surrounding the borehole. Generally the methods include obtaining subsurface resistivity measurement data with a well tool disposed within the borehole and fitting the obtained resistivity measurement data to an equivalent electric circuit model to determine the borehole and/or formation characteristic. The circuit model of these embodiments is representative of a response of the well tool to borehole and formation parameters. The systems generally include a well tool and an apparatus adapted to be coupled to the well tool. The apparatus includes means for receiving measurement data generated by the well tool, means for storing model parameters representative of a response of the well tool to borehole and formation properties, and means for comparing the received measurement data to the stored model parameters to determine the borehole and/or formation characteristic. The disclosed equivalent circuit model is characterized by an electric circuit having at least one resistor-in-parallel component.

The invention discloses a simulation method for calculating the lightning back-striking performance of UHV transmission lines. The simulation method comprises the following steps: dividing wires among long-span transmission towers into a plurality of line segments, establishing a distributed parameter circuit model for each line segment, establishing a multi-wave impedance model for each tower, then selecting the lightning parameters according to lightning activities, integrating all models and calculating the lightning withstand level, and calculating to obtain the back-striking trip rate of the UHV transmission lines according to the lightning withstand level and a series of formulae. The simulation method disclosed by the invention establishes the distributed parameter models of the line segments in consideration of high long-span transmission towers and long line spans, subdivides the wave impedance of different parts of the towers, and establishes the multi-wave impedance models in consideration of the refraction and reflection processes of lightning waves on the tower bodies so as to make the simulation results more precise and practical.

This invention determines whether two logic level circuit models have equivalent functionality. The method allows difficult portions of the equivalent functionality check to be partitioned and concurrently solved in a distributed computing environment. This permits the user to use, in a scalable fashion, additional computing resources to rapidly solve difficult equivalent functionality checks. The method allows difficult checks to be solved using (1) a divide-and-conquer approach, (2) by a competitive approach in which many independent attempts are made to solve the same check, or (3) by allocating more resources to solve the difficult check.

In a method of the present invention, performance characteristics of a printed circuit board are analyzed. The printed circuit board, bypass components and an applied stimulus are modeled. Each of the bypass components includes a capacitor and a resistor in series with each other. Alternatively, a second capacitor is coupled in parallel to the above capacitor and resistor. A simulation of the circuit model is then performed. In this embodiment of the invention, the simulation is responsive to the stimulus as is performed over a range of bypass resistor values. In another embodiment of the invention, a printed circuit board is described with components and characteristics that reduce noise. Such a printed circuit board includes a power plane and a plurality of bypass components. Moreover, the plurality of bypass components include bypass capacitors and bypass resistors coupled in series between the positive power plane and the negative power plane.

The invention discloses a transient analysis method under an integrated circuit power supply network full-parameter model. The method comprises the following steps: a determining step of determining the full-parameter model information of a to-be-analyzed integrated circuit power supply network; an establishing step of establishing a power supply network topological graph comprising a plurality of independent sub-circuits based on the full-parameter model information; and an analysis step of in parallel carrying out direct current working site analysis and transient analysis on each sub-circuit of the power supply topological graph to obtain the circuit node voltage distribution graph at each moment of each sub-circuit. As for a full-parameter circuit model, the invention establishes a linear system capable of adopting a symmetric matrix solver, and adopts a direct solver and an iterative solver in a hybrid manner according to the characteristics of problem solving. The method and system disclosed by the invention can be applied to carrying out fast and precise transient voltage drop analysis on the power supply network under the full-parameter model in formats such as an SPICE (Simulation Program with Integrated Circuit Emphasis) net-list form, especially on the aspect of memory consumption, and the system is improved to a great extent in comparison with the original emulator.