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Microcontrol architecture for a system on a chip (soc)

A micro-control processor, operating system technology, used in instruments, electrical digital data processing, etc.

Inactive Publication Date: 2007-12-26
NOKIA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] According to presently preferred embodiments of the present invention, the problems discussed above, as well as others, are solved and other advantages are realized

Method used

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  • Microcontrol architecture for a system on a chip (soc)
  • Microcontrol architecture for a system on a chip (soc)
  • Microcontrol architecture for a system on a chip (soc)

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Embodiment Construction

[0021] By way of introduction, embodiments of the present invention provide a method and apparatus to control a SoC architecture in which different source, sink, buffer and processing nodes communicate using connections controlled by switching nodes. More specifically, embodiments of the present invention enable more detailed control of serial data flow, hardware accelerators, and off-chip communications, and can be implemented in microcode triggered by the host processor.

[0022] Control of data flow connections between on-chip physical hardware processes and to and from virtual processes outside the SoC is implemented as software running on a separate dedicated microcontroller. The software used to control the configurable hardware is preferably implemented as microcode, with the hardware itself hidden from the main processor operating system through the microcode executing on a dedicated microcontroller.

[0023] Data flows, including off-chip communications, their sources...

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Abstract

A data processing system includes a main processor that runs an operating system; a microcontrol processor coupled to the main processor that controls a first plurality of hardware processes as directed by the main processor, and a switching matrix controlled by the microcontrol processor and coupled between input ports and output ports of individual ones of the first plurality of hardware processes for routing data between individual ones of the first plurality of hardware processes. In one aspect there is a unit having an interface for coupling to at least one peripheral unit, where each of the unit and the peripheral unit include a system on a chip. Operations of a local microcontrol processor of the unit are directed through macro commands issued by the main processor, and for the execution of some macro commands the local microcontrol processor of the unit communicates with the local microcontrol processor of the peripheral unit via an interconnecting bus that implements a plurality of virtual channels.

Description

technical field [0001] Embodiments of the present invention are directed to system-on-chip (SoC) architectures, where the main processor uses an operating system (OS) to control the data flow of the architecture and hardware (HW) acceleration to pass control commands to software (SW), where the operating System such as Symbian OS TM (Symbian and Symbian OS are registered trademarks of Symbian Software Limited), where the software is preferably a microcoded software-assisted subsystem used to set up and control processing and data flow. The controlled processing can be both on-chip and off-chip, interconnected by fast communication links. Background technique [0002] Typical data processor bus system configurations are too slow for use in SoC architecture communication, especially when multiple data streams are used simultaneously. Whenever a real-time, multimedia or other large-capacity data stream needs to be transmitted or circulated through a processing unit, such as a...

Claims

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Application Information

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IPC IPC(8): G06F13/00G06F13/14
Inventor 基姆・桑斯特罗姆
Owner NOKIA CORP