Semiconductor wafer including semiconductor chips divided by scribe line and process-monitor electrode pads formed on scribe line

A technology for monitoring electrodes and semiconductors, used in semiconductor/solid-state device testing/measurement, semiconductor device, semiconductor/solid-state device manufacturing, etc., and can solve problems such as increased manufacturing costs

Inactive Publication Date: 2008-01-16
RICOH MICROELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As a result, manufacturing costs increase

Method used

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  • Semiconductor wafer including semiconductor chips divided by scribe line and process-monitor electrode pads formed on scribe line
  • Semiconductor wafer including semiconductor chips divided by scribe line and process-monitor electrode pads formed on scribe line
  • Semiconductor wafer including semiconductor chips divided by scribe line and process-monitor electrode pads formed on scribe line

Examples

Experimental program
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no. 1 example

[0091] 1A and 1B are schematic diagrams for describing a semiconductor wafer 1 according to an embodiment of the present invention. More specifically, FIG. 1A is a plan view showing the vicinity of a scribe line of the semiconductor wafer 1 , and FIG. 1B is a cross-sectional view taken along line A-A of FIG. 1A . FIG. 2 is a plan view showing the general structure of the semiconductor wafer 1 according to the embodiment of the present invention. 3A and 3B are schematic diagrams for describing a portion of a process monitoring apparatus placed on a scribe line according to an embodiment of the present invention. More specifically, FIG. 3A is a plan view showing a part of the process monitoring device, and FIG. 3B is a cross-sectional view taken along line B-B of FIG. 3A . The semiconductor wafer 1 according to the embodiment of the present invention has a three-layer metal wiring structure.

[0092] As shown in FIG. 2 , the semiconductor wafer 1 has a plurality of semiconduct...

no. 2 example

[0138] 16A and 16B are schematic diagrams illustrating a semiconductor wafer 101 according to an embodiment of the present invention. More specifically, FIG. 16A is a plan view showing the vicinity of the scribe line 105 of the semiconductor wafer 101, and FIG. 16B is a cross-sectional view taken along line A-A of FIG. 16A. FIG. 17 is a plan view showing the general structure of a semiconductor wafer 101 according to an embodiment of the present invention. 18A and 18B are schematic diagrams for describing a process monitoring apparatus placed on a scribe line according to an embodiment of the present invention. More specifically, FIG. 18A is a plan view showing a part of the process monitoring device, and FIG. 18B is a cross-sectional view taken along line B-B of FIG. 18A . The semiconductor wafer 101 according to the embodiment of the present invention has a three-layer metal wiring layer structure.

[0139] As shown in FIG. 17 , the semiconductor wafer 101 has a plurality ...

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Abstract

The present invention discloses a semiconductor wafer having a scribe line dividing the semiconductor wafer into a matrix of plural semiconductor chips. The semiconductor wafer includes a polysilicon layer, a poly-metal interlayer insulation film formed on the polysilicon layer, and a first metal wiring layer formed on the poly-metal interlayer insulation film. The semiconductor wafer includes a process-monitor electrode pad formed on a dicing area of the scribe line. The process-monitor electrode pad has a width greater than the width of the dicing area. The process-monitor electrode pad includes a contact hole formed in the poly-metal insulation film for connecting the first metal wiring layer to the polysilicon layer.

Description

technical field [0001] The present invention relates to a semiconductor wafer, and more particularly, to a semiconductor wafer having a plurality of semiconductor chips divided by scribe lines and process monitoring electrodes formed on the scribe lines. Background technique [0002] In a typical slicing process of a semiconductor wafer (slicing target) for dividing a plurality of semiconductor chips from the semiconductor wafer, a ring-shaped blade having, for example, diamond particles attached thereto rotates at high speed and comes into contact with a scribe line formed on the semiconductor wafer . A semiconductor wafer is sliced ​​into a plurality of semiconductor chips by contacting a rotating blade on a scribing line. For better slicing performance, various parameters are optimized. These parameters include, for example, blade thickness, blade rotational speed, platform speed, and kerf depth. [0003] A semiconductor wafer has a layered structure in which various t...

Claims

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Application Information

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IPC IPC(8): H01L21/66B22D17/20H01L21/3205H01L21/822H01L23/52H01L27/04
CPCH01L2224/05
Inventor吉田雅昭神埜聪
OwnerRICOH MICROELECTRONICS CO LTD