Method for forming metal pattern in semiconductor device

Abstract

A method for forming a metal pattern in a semiconductor device includes forming an etch stop layer over a semi-finished substrate including a metal layer, forming a hard mask over the etch stop layer,etching the hard mask to form a hard mask pattern exposing the etch stop layer, and etching the etch stop layer and the metal layer using the hard mask pattern.

Description

[0001] related application [0002] This application claims priority from Korean Patent Application Nos. 10-2006-0134344 and 10-2007-0045288 filed on December 27, 2006 and May 10, 2007, respectively, the entire contents of which are hereby incorporated by reference. technical field [0003] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming a metal pattern using a hard mask in a semiconductor device and a method of forming a gate electrode using the hard mask in a semiconductor device. Background technique [0004] Polysilicon layers have typically been used as gate electrodes in metal oxide semiconductor (MOS) transistors. Such a polysilicon gate electrode exhibits the advantage of a stable formation process. However, various patterns including the gate electrode have become micronized with the high integration of semiconductor devices. The recent micronization technology has achieved a line widt...

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Therefore, the yield rate will be greatly reduced

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