Method and apparatus for master-salve clock synchronization

A clock synchronization and master clock technology, applied in time division multiplexing systems, electrical components, multiplexing communication, etc., can solve the delay error, the actual network channel is difficult to meet, and affect the stability of the master-slave clock synchronization state Sex slave clock accuracy and other issues

Inactive Publication Date: 2008-07-23
ZTE CORP
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0023] However, since the application of the IEEE1588 protocol is based on the ideal condition that the transmission delay of the master-slave clock signal is symmetrical, it is difficult for the actual network channel to meet this condition
If there is random interference or bur

Method used

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  • Method and apparatus for master-salve clock synchronization
  • Method and apparatus for master-salve clock synchronization
  • Method and apparatus for master-salve clock synchronization

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Embodiment Construction

[0072] The method of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments of the present invention.

[0073] Figure 1(b) is a schematic diagram of the k-times clock synchronization process in the embodiment of the present invention. As shown in Figure 1(b), the slave clock, as the initiator of the synchronization request message, performs j times with the master clock in a synchronization period For clock synchronization, k clock synchronization packets need to be exchanged for each clock synchronization.

[0074] Fig. 2 is the method flowchart of master-slave clock synchronization in the embodiment of the present invention, as shown in Fig. 2, the master-slave clock synchronization process in a synchronization period is taken as an example to illustrate, and this method comprises:

[0075] Step 201: The slave clock initiates the exchange of clock synchronization messages to the master clock to obtain tim...

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Abstract

The invention discloses a method and a device for synchronizing a master clock and a slave clock, the method comprises: sending synchronous request message to the master clock for many times in a simultaneous cycle by the slave clock, recording the corresponding the time value, then, utilizing a median average filtering algorithm to obtain the optimum time migration amount, utilizing the time migration amount to adjust the slave clock, eliminating the delay inequality which is caused by stochastic disturbance and burst interference of a network communication channel between the master clock and the slave clock, guaranteeing the stability of slave clock signals, and increasing the synchronous preciseness of the master clock and the slave clock.

Description

technical field [0001] The invention relates to a general-purpose clock synchronization technology, in particular to a master-slave clock synchronization method and device. Background technique [0002] The Institute of Electrical and Electronics Engineers (IEEE) 1588 protocol, which is called the precision clock synchronization protocol standard for network measurement and control systems, also known as the Precision Time Protocol (PTP, Precision Time Protocol), is a network clock synchronization protocol proposed by IEEE. The environment used to realize high-precision clock synchronization has been widely used in the fields of Ethernet, communication systems, distributed system measurement and control, etc., because its precision can reach microsecond level. [0003] The IEEE1588 protocol implements clock synchronization by exchanging clock synchronization packets. During the synchronization process, the slave clock sends a synchronization request message to the master cl...

Claims

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Application Information

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IPC IPC(8): H04J3/06H04L29/06
Inventor 方永重高翔郑伟
Owner ZTE CORP
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