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Semiconductor device comprising a barrier insulating layer and related method

A semiconductor and insulating layer technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problems of high cost, increased possibility, and reduced reliability of storage devices

Inactive Publication Date: 2008-07-30
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, a bridging problem will occur between the storage node layers connected to the contact plug, and the reliability of the storage device will be greatly reduced.
[0003] Furthermore, it is even more difficult to form a compactly arranged contact plug or storage node layer in a semiconductor device having an interconnection line (such as a bit line electrode or a gate electrode) disposed near the contact plug or storage node layer.
The difficulty is greater because in this case the possibility of forming a bridge between the interconnection line and the contact plug or between the interconnection line and the storage node increases
Therefore, very expensive equipment for manufacturing semiconductor devices is required to form contact plugs or storage node layers with finer patterns

Method used

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  • Semiconductor device comprising a barrier insulating layer and related method
  • Semiconductor device comprising a barrier insulating layer and related method
  • Semiconductor device comprising a barrier insulating layer and related method

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Embodiment Construction

[0015] In the drawings, layer thicknesses and areas are not necessarily to scale. In addition, as used herein, when a first element is described as being "on" a second element, the first element can be directly on the second element, or intervening elements may be present.

[0016] 1-12 illustrate a method of manufacturing a semiconductor device according to an embodiment of the present invention, and FIGS. 11 and 12 illustrate an intermediate structure in the manufacture of a semiconductor device according to an embodiment of the present invention.

[0017] 1 and 2, in the embodiment described with reference to FIGS. 1-12, a device isolation layer 110 is formed in a semiconductor substrate 105 to define a plurality of first active regions 115a and a plurality of second active regions 115b. For example, the device isolation layer 110 may be formed by forming a trench in the semiconductor substrate 105 and then filling the trench with an insulating layer. The first and second ...

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PUM

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Abstract

The present invention provides a semiconductor device including a blocking insulating layer and a manufacturing method thereof. The semiconductor device includes: a semiconductor substrate including a plurality of active regions, wherein the active regions are defined by a device isolation layer and arranged along a first direction; a plurality of bit line electrodes connected to the active regions, each of which The bit line electrodes extend along the second direction; and a plurality of first blocking insulating layers. Each of the first blocking insulating layers extends along a third direction, at least one of the first blocking insulating layers is disposed on a corresponding first portion of the device isolation layer between two of the active regions. , the two active regions are adjacent along a first direction, and the first direction and the second direction are different from each other.

Description

technical field [0001] Embodiments of the present invention relate to semiconductor devices and methods of manufacturing the semiconductor devices. In particular, embodiments of the present invention relate to a semiconductor device including a blocking insulating layer and a method of manufacturing the semiconductor device. Background technique [0002] Each size of patterns in a semiconductor device can be reduced to increase the integration degree of the semiconductor device. At some point, however, the limits of what can be achieved using photolithography to form finer patterns are being reached. For example, process margins of contact plugs used in memory devices are decreasing. That is, the size of the contact plugs is reduced, and the separation pitch between the contact plugs is reduced. Therefore, a bridge problem may occur between storage node layers connected to the contact plugs, and the reliability of the storage device may be greatly reduced. [0003] Furth...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/105H01L23/522H01L21/8239H01L21/768
CPCH10B12/315H10B12/34H10B12/053H10B12/482H01L21/28H10B12/00
Inventor 徐亨源金东铉李康润金圣求
Owner SAMSUNG ELECTRONICS CO LTD