Poly-crystal face-to-face stacking and packaging construction

Abstract

The present invention relates to a multiple wafers face to face stack encapsulation structure which comprises of a substrate, a first wafer, a secondary wafer, multiple first bumps, multiple second bumps and multiple external connection terminals on substrate. The active surface of first wafer is placed on the first surface of substrate. The first bump is placed in hole of first bump and connected electrically with first wafer to substrate. The active surface of the second wafer is placed on the second surface of substrate. The second bump is placed in hole of second bump and connected electrically with second wafer to substrate. So the substrate is placed between face to face stack wafers and bump is embedded in substrate, the electrical property conductive path is short and the encapsulation is thinning.

Description

technical field [0001] The invention relates to a multi-chip package structure, in particular to a multi-chip face-to-face stack package structure. Background technique [0002] Due to the continuous evolution of electronic technology, products with more complex functions and more user-friendly products are introduced. In terms of the appearance of electronic products, they are also designed towards the trend of light, thin, short and small. With the increasing demand for miniaturization and high operating speed, multiple chips will be integrated in a package structure to achieve more than twice the capacity or more functional requirements. For example, in the previous multi-chip stack package structure, it is Multiple chips are stacked and encapsulated in an encapsulation material. [0003] see figure 1 As shown, the conventional multi-chip stacked package structure 100 is a back-to-back stacking type, mainly including a substrate 110, a first chip 120, a second chip 130,...

AI Technical Summary

Problems solved by technology

However, the volume of the multi-chip stacked package structure will increase with the increase of the stacked chips, so that the number of chip stacks is limited and it is impossible to increase memory capacity and / or expand functions.

[0004] It can be seen that the above-mentioned existing multi-chip stacked package structure obviously still has inconvenience and defects in structure and use, and needs to be further improved urgently.

In order to solve the above-mentioned problems, the relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and the general products do not have a suitable structure to solve the above-mentioned problems. This is obviously related. The problem that the industry is eager to solve

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