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Annular voltage controlled oscillator

A voltage-controlled oscillator, ring technology, applied in the direction of single output arrangement, automatic power control, electric pulse generator circuit, etc., can solve the problem of low performance analog signal of oscillator

Inactive Publication Date: 2010-04-21
HUAZHONG UNIV OF SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

like figure 1 It is a traditional five-level ring oscillator, but such an oscillator can only get low-performance analog signals, so we invented a high-performance high-performance ring voltage-controlled oscillator with an available digital clock output

Method used

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  • Annular voltage controlled oscillator

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Embodiment Construction

[0014] The present invention will be further described in detail below with reference to the accompanying drawings and taking n=5 as an example.

[0015] Such as figure 2 As shown, the structure of the ring voltage controlled oscillator of the present invention is:

[0016] 5-level delay unit s 1 to s 5 Connected end-to-end in a ring, the positive phase and negative phase input terminals INP and INN of each stage are respectively connected to the negative phase and positive phase delay output terminals OUTN and OUTP of the previous stage, and the positive phase and negative phase delay of the first stage The input terminals INP and INN are respectively connected to the negative phase and positive phase delay output terminals OUTN and OUTP of the last stage; the positive phase and negative phase signal output terminals OUT+ and OUT- of each stage are respectively connected to each output buffer circuit b 1 to b 5 The positive-phase and negative-phase buffered inputs IN+ an...

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Abstract

The invention discloses a ring shape voltage controlled oscillator, comprising 3 to 5 stages of time-delay unit and output buffer circuit, each stage of the time-delay unit is connected in a ring shape, and the input ends of positive phase and negative phase of each stage are respectively connected with the input ends of positive phase and negative phase of former stage. The input ends of positivephase and negative phase of the first time-delay unit are respectively connected with the output ends of positive phase and negative phase of the last time-delay unit. The signal input ends of positive phase and negative phase of each stage are respectively connected with the input ends of positive phase and negative phase of the output buffer circuit. The invention has characters of wide regulating range and low wobble. When a five stages time-delay structural is adopted, the frequency adjustment range of the obtained output signal is 100M to 1. 3GHz,when the center frequency is 900 MHz, thephase noise is -87dBc / Hz 100KHz and -108dBc / Hz 1MHz,the dutyfactor is about 50and the average current is 15mA.

Description

technical field [0001] The invention belongs to the analog integrated circuit technology, and in particular relates to a ring voltage-controlled oscillator, which can generate ten-phase non-overlapping clock signals with wide adjustment range and low jitter. Background technique [0002] Oscillators are widely used in integrated circuits and are an integral part of many electronic systems, from clocking microprocessors to carrier synthesis in cellular phones, and in phase-locked loops (PLLs), voltage-controlled oscillators are indispensable part. Inductor-capacitance (LC) oscillators are limited in application in some microcircuits due to their large footprint, so the area is relatively small, with a wide tuning range and low jitter ) research on the ring voltage-controlled oscillator has become a hot spot in the analog integrated circuit. [0003] When the open-loop gain of a circuit is greater than 0dB when its phase shift is 360°, the circuit will oscillate, which is th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K3/03H03K3/013H03K5/13H03K19/0185H03L7/099H03K5/134
Inventor 雷鑑铭邴林林邹雪城邹志革贺黉胤
Owner HUAZHONG UNIV OF SCI & TECH