Space vector width pulse modulation method based on FPGA

A technology of space vector pulse width and modulation method, applied in vector control systems, control systems, control generators, etc., can solve the problems of complex calculation and difficult implementation, and achieve the effect of flexible programming

Inactive Publication Date: 2008-09-24
JIANGNAN UNIV
View PDF0 Cites 30 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, the existing space vector pulse width modulation (SVPWM) algorithm implementation scheme is relatively complicated in calculation, and it can be realized on DSP only by virtue of the powerful calculation capability of DSP, and it is difficult to realize these complex calculations on FPGA

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Space vector width pulse modulation method based on FPGA
  • Space vector width pulse modulation method based on FPGA
  • Space vector width pulse modulation method based on FPGA

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0023] A kind of method that the present invention proposes realizes Space Vector Pulse Width Modulation (SVPWM) algorithm on FPGA, this method utilizes the design idea of ​​FPGA modularization to divide SVPWM algorithm into such as figure 1 For the nine modules shown, the specific implementation method of each module will be introduced in detail below.

[0024] Step one, timing control. The timing control module adopts the synchronous pulse generated by the adjustable up-down counter, and the synchronous pulse acts on the figure 1 Three blocks of PL1, PL2 and PL3, including all other modules in the scheme. By detecting the falling edge of the synchronization pulse to trigger the circuit to ensure the synchronization of each module, the three circuits of PL1, PL2 and PL3 constitute a three-stage pipeline. The period Ts of the synchronous pulse is the period of the PWM wave, and considering that SVPWM is only a functional module in a complete AC servo system, the synchronous ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides a realizing scheme of a space vector pulse width modulating arithmetic based on FPGA. The scheme divides a space vector pulse width modulating (SVPWM) adjustor into nine modules according to an FPGA modular design philosophy which are: picketage, time-oriented sequential control; sector judging, a state machine, vector selection, time calculation, over modulation, PWM output and dead area adjusting modules. The scheme fully utilizes the parallel processing characteristic of the FPGA as well as the logic realizing and hardware multiplier resources and mainly adopts logical judgment and a plurality of multiplication calculations, thus avoiding the complex calculations like arc tangent and trigonometric function. The scheme supports the modes of over modulation, dead area adjusting, symmetrical PWM and non- symmetrical PWM.

Description

technical field [0001] The invention relates to the field of AC motor control, in particular to the application of FPGA (Programmable Logic Gate Array) technology in the field of AC motor control, and proposes a general-purpose space vector pulse width modulation implementation on the FPGA. Background technique [0002] The idea of ​​Space Vector Pulse Width Modulation (SVPWM) was first proposed by Van Der Broeck in the 1980s, and its theory and algorithm have been greatly developed later. At present, SVPWM is one of the most popular high-performance AC servo drive system realization technologies. [0003] With the advancement of FPGA technology and the decline of cost, another optional way is provided for the realization of SVPWM algorithm. The parallel processing method of FPGA hardware ensures the high speed and high precision of the system operation, and its flexible and rich external pins provide convenience for controlling multiple motors. At the same time, the stabil...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): H02P21/00H02P27/08H02P27/12H02M7/48
Inventor 沈艳霞陈星
Owner JIANGNAN UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products