Method for scrambling and descrambling assistant synchronous channel sequence in a down synchronous system
A secondary synchronization channel and synchronization system technology, applied in the field of downlink synchronization systems, to reduce requirements, reduce collision probability, and reduce computational complexity
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[0071] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.
[0072] figure 1 It is a schematic diagram of a frame structure of a downlink synchronization channel. The PSCH sequence and the SSCH sequence are sent every 5ms, and are respectively located in the 7th and 6th symbols of the first subframe. Since the positions of the PSCH sequence and the SSCH sequence are fixed, when the timing detection of the PSCH sequence is completed, we can easily extract the SSCH sequence from the previous symbol.
[0073] For the synchronization channel in the downlink synchronization system in the present invention, for the SSCH sequence composed of short codes with a length of N, select a specific row / column in the FFT matrix with a length of N as the scrambling code sequence of the SSCH sequence, and use this The scrambling code sequence scrambles the SSCH sequence.
[0074] Such as figure 2 As shown,...
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