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Cell compatibilty in multiprocessor systems

A multi-processor, compatible technology, applied in the direction of electrical digital data processing, instruments, computers, etc., can solve the problem of undesired resource allocation

Active Publication Date: 2009-02-04
HEWLETT-PACKARD ENTERPRISE DEV LP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This strict allocation of resources may be undesirable because the requirements of said process may change over time during the run of the process

Method used

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  • Cell compatibilty in multiprocessor systems
  • Cell compatibilty in multiprocessor systems
  • Cell compatibilty in multiprocessor systems

Examples

Experimental program
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Embodiment Construction

[0012] Described herein are examples of multiprocessor computer systems and techniques for managing element compatibility in multiprocessor systems. In some implementations, the methods described herein can be implemented as logic instructions on a computer-readable medium. The logic instructions, when executed on a processor, cause a general purpose computing device to be programmed as a special purpose machine to implement the methods. When the processor is configured by the logic instructions to perform the methods described herein, the processor constitutes structure for performing the described methods.

[0013] Referring to FIGS. 1A , 1B and 1C , a dividable computer system 100 may include a number of elements or units 104 . In FIG. 1A, only two units 104A and 104B are shown. However, more than two units 104 may create the dividable computer system 100 . For example, FIG. 1B depicts a partitionable computer system 100' having four units 104A, 104B, 104C, and 104D. In...

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Abstract

The invention relates to cell compatibility in a multiprocessor computer system. In one embodiment, a multiprocessor computer system (100'') comprises at least a first partition (116) having a first operating system comprising logic to initiate a request to add a first cell (104) to the first partition (116), open a communication interface between the first operating system and a firmware module on the first cell (104), and transmit from the first partition (116) to the first cell (104) a compatibility command, logic in the first cell (104) to determine whether the first cell (104) is compatible with the first partition (116), and logic in the first partition (116) to add the first cell (104) to the first partition (116) in response to a determination that the first cell (104) is compatible with the first partition (116).

Description

technical field [0001] The present invention relates to cell compatibility in multiprocessor systems. Background technique [0002] High-performance computer systems can utilize multiple processors for enhanced processing capabilities. The processing workload can be divided and distributed among the processors, thereby reducing execution time and improving performance. One architectural model for high-performance multiprocessor systems is the cache-coherent non-uniform memory access (ccNUMA) model. Under the ccNUMA model, system resources such as processors and random access memory can be partitioned into groups called locality domains, also called "nodes" or "cells." Each node may include one or more processors and physical memory. A processor in a node can access memory in its node (such memory is sometimes called local memory) as well as memory in other nodes (such memory is sometimes called remote memory). [0003] A multiprocessor computer system can be divided into...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/163
CPCG06F13/4022
Inventor N·J·休斯S·P·哈克
Owner HEWLETT-PACKARD ENTERPRISE DEV LP