High speed divider and method thereof for implementing high speed division arithmetic

A high-speed, division technology, applied in the calculation using the number system, the use of non-contact manufacturing equipment for calculation and other directions, can solve the problem of limited operation accuracy, the operation accuracy is not very high and other problems, to reduce the clock cycle, easy to design and the effect of implementing, simple structure

Inactive Publication Date: 2009-07-29
COMBA TELECOM SYST CHINA LTD
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  • Description
  • Claims
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Problems solved by technology

However, the calculation accuracy of this invention is limited, and it is only suitable for

Method used

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  • High speed divider and method thereof for implementing high speed division arithmetic
  • High speed divider and method thereof for implementing high speed division arithmetic
  • High speed divider and method thereof for implementing high speed division arithmetic

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Embodiment

[0033] The basic principle of the present invention is as follows: in order to obtain the result after the division operation Quotient = Dividend Divisor , Convert its division operation into a multiplication operation, that is:

[0034]

[0035] Among them, abs(Divisor) represents the absolute value of Divisor. It can be seen from the above formula that in order to realize the division operation, the calculation When , the Divisor is decomposed firstly to obtain the sign bit of the Divisor, and then the absolute processing is performed on the Divisor to obtain abs(Divisor), Obtained by searching, controlling and looking up a table for abs(Divisor) (specific operations such as steps (4), (5) and (6)). followed by Perform multiplication with Dividend, and then combine the multiplication result with the sign bit of the Divisor described in step (2) (i.e. perform multiplication), and finally the r...

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Abstract

The invention provides a high-speed divider comprising a coded conversion module, a sign bit decision module, a nonzero bit search module, a reciprocal value lookup module, a correction adjusting module and a multiplication processing module. The coded conversion module is sequentially connected with the sign bit decision module, the nonzero bit search module, the reciprocal value lookup module, the correction adjusting module and the multiplication processing module; the coded conversion module, the sign bit decision module are respectively connected with the multiplication processing module; and the output end of the multiplication processing module outputs the results of division operation. The high-speed divider has controllable operation accuracy, not only can freely set the corresponding operation accuracy according to the actual application requirements, but also can be used for high-speed mathematical operation processing with short operation time and small processed delay, and has simple structure and good feasibility.

Description

technical field [0001] The invention relates to the field of digital signal processing in the fields of communication and electronic technology, in particular to a high-speed divider and a method for realizing high-speed division operation thereof. Background technique [0002] In the field of digital signal processing, division operation is an essential processing. Especially when it comes to adaptive signal processing, processing such as normalization or matrix operations is often encountered, and these must be realized through division operations. With the development of mobile communication technology and the continuous improvement of digital signal processing technology, more and more subsystems or modules based on signal processing technology are used in today's communication and electronic equipment. Therefore, many algorithm operations, Operations such as addition, subtraction, multiplication, and division must be implemented on hardware circuits, through fixed hard...

Claims

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Application Information

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IPC IPC(8): G06F7/52
Inventor 胡应添罗漫江
Owner COMBA TELECOM SYST CHINA LTD
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